Displaying 5 results from an estimated 5 matches for "1000103".
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100003
2011 Jun 09
0
Change to pickups in Asterisk 1.8 - not working on local channels?
Hello all,
We have a customer who upgraded from Asterisk 1.6 to 1.8, and pickup groups
which previously worked fine have stopped working.
Can anyone advise if there has been a change in how pickups work?
Here is an example where 1000101 is trying to pick up a call to 1000103:
<SIP/product-local-00000005>AGI Rx << EXEC Dial
"Local/1000103 at product-pickup
/n,60,M(product-answered^0^1306286740.11)orL(3600000:60000)"
-- AGI Script Executing Application: (Dial) Options:
(Local/1000103 at product-pickup
/n,60,M(product-answered^0^1306286740.11)or...
2011 Jun 29
0
XML parsing
...</scan>
</scanList>
<binaryDataArrayList count="2">
<binaryDataArray encodedLength="0">
<referenceableParamGroupRef ref="mzArray"/>
<cvParam cvRef="IMS" accession="IMS:1000103" name="external
array length" value="8399"/>
<cvParam cvRef="IMS" accession="IMS:1000102" name="external
offset" value="16"/>
<cvParam cvRef="IMS" accession="IMS:1000104" name=&q...
2008 Aug 15
0
[LLVMdev] Eliminating gotos
On Thu, Aug 14, 2008 at 2:55 PM, Benedict Gaster
<benedict.gaster at amd.com> wrote:
> Hi Mon Ping,
>
> Discussing this with others in AMD it came up if it is possible for LLVM to
> take a program that has a reducible graph (any C code without goto/setjmp)
> and generate one that is irreducible? If it is the case that the code is
> actually structured coming in, a simple
2011 Mar 23
4
ACPI errors during bootup
...: 5, 131072 bytes)
Memory: 503320k/523172k available (2189k kernel code, 19224k reserved, 920k
data
, 232k init, 0k highmem)
Checking if this processor honours the WP bit even in supervisor mode... Ok.
Calibrating delay loop (skipped), value calculated using timer frequency..
2000.
20 BogoMIPS (lpj=1000103)
Security Framework v1.0.0 initialized
SELinux: Initializing.
selinux_register_security: Registering secondary module capability
Capability LSM initialized as secondary
Mount-cache hash table entries: 512
CPU: L1 I cache: 32K, L1 D cache: 32K
CPU: L2 cache: 512K
Intel machine check architecture s...
2011 Jun 30
0
help with interpreting what nnet() output gives:
...</scan>
</scanList>
<binaryDataArrayList count="2">
<binaryDataArray encodedLength="0">
<referenceableParamGroupRef ref="mzArray"/>
<cvParam cvRef="IMS" accession="IMS:1000103" name="external
array length" value="8399"/>
<cvParam cvRef="IMS" accession="IMS:1000102" name="external
offset" value="16"/>
<cvParam cvRef="IMS" accession="IMS:1000104" name=&q...