Displaying 20 results from an estimated 128 matches for "0x00ffffff".
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0x0fffffff
2016 Sep 16
2
[PATCH 2/3] drm/nouveau/led: guard against a division by 0
...git a/drm/nouveau/nouveau_led.c b/drm/nouveau/nouveau_led.c
> index 5e28b5f..1f731da 100644
> --- a/drm/nouveau/nouveau_led.c
> +++ b/drm/nouveau/nouveau_led.c
> @@ -44,7 +44,10 @@ nouveau_led_get_brightness(struct led_classdev *led)
> div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
> duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
>
> - return duty * LED_FULL / div;
> + if (div > 0)
> + return duty * LED_FULL / div;
> + else
> + return 0;
minor nitpick: you can drop the else, I don't mind...
2016 Sep 16
7
[PATCH 1/3] drm/nouveau/led: don't access led subdev if it wasn't initialized
From: Karol Herbst <karolherbst at gmail.com>
Fixes a kernel crash on suspend/resume.
---
drm/nouveau/nouveau_led.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drm/nouveau/nouveau_led.c b/drm/nouveau/nouveau_led.c
index 9eed5a6..5e28b5f 100644
--- a/drm/nouveau/nouveau_led.c
+++ b/drm/nouveau/nouveau_led.c
@@ -107,7 +107,8 @@ nouveau_led_suspend(struct
2016 Mar 16
1
[PATCH v2 2/2] volt: properly detect entry based voltage tables
...0;
- info->max = info->base;
+ info->min = 0;
+ info->max = info->base;
break;
case 0x50:
- info->min = nvbios_rd32(bios, volt + 0x0a);
- info->max = nvbios_rd32(bios, volt + 0x0e);
- info->base = nvbios_rd32(bios, volt + 0x12) & 0x00ffffff;
+ info->min = nvbios_rd32(bios, volt + 0x0a);
+ info->max = nvbios_rd32(bios, volt + 0x0e);
+ info->base = nvbios_rd32(bios, volt + 0x12) & 0x00ffffff;
/* offset 4 seems to be a flag byte */
if (nvbios_rd32(bios, volt + 0x4) & 1) {
- info->ty...
2016 Sep 16
0
[PATCH 2/3] drm/nouveau/led: guard against a division by 0
...ions(+), 1 deletion(-)
diff --git a/drm/nouveau/nouveau_led.c b/drm/nouveau/nouveau_led.c
index 5e28b5f..1f731da 100644
--- a/drm/nouveau/nouveau_led.c
+++ b/drm/nouveau/nouveau_led.c
@@ -44,7 +44,10 @@ nouveau_led_get_brightness(struct led_classdev *led)
div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
- return duty * LED_FULL / div;
+ if (div > 0)
+ return duty * LED_FULL / div;
+ else
+ return 0;
}
static void
--
2.8.0
2016 Sep 16
0
[PATCH 2/3] drm/nouveau/led: guard against a division by 0
...veau_led.c b/drm/nouveau/nouveau_led.c
>> index 5e28b5f..1f731da 100644
>> --- a/drm/nouveau/nouveau_led.c
>> +++ b/drm/nouveau/nouveau_led.c
>> @@ -44,7 +44,10 @@ nouveau_led_get_brightness(struct led_classdev *led)
>> div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
>> duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
>>
>> - return duty * LED_FULL / div;
>> + if (div > 0)
>> + return duty * LED_FULL / div;
>> + else
>> + return 0;
> minor nitpick: you ca...
2013 Apr 26
1
[PATCH] nouveau: Allow 3D accelerators with output ports
...fc6..0dce0aa 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -60,7 +60,7 @@ static Bool NVUnmapMem(ScrnInfoPtr pScrn);
#define NOUVEAU_PCI_DEVICE(_vendor_id, _device_id) \
{ (_vendor_id), (_device_id), PCI_MATCH_ANY, PCI_MATCH_ANY, \
- 0x00030000, 0x00ffffff, 0 }
+ 0x00030000, 0x00fffdff, 0 }
static const struct pci_id_match nouveau_device_match[] = {
NOUVEAU_PCI_DEVICE(0x12d2, PCI_MATCH_ANY),
--
1.7.10.4
2016 Aug 22
10
[PATCH v2] drm/nouveau: add a LED driver for the NVIDIA logo
...d_get_brightness(struct led_classdev *led)
+{
+ struct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
+ struct nouveau_drm *drm = nouveau_drm(drm_dev);
+ struct nvif_object *device = &drm->device.object;
+ u32 div, duty;
+
+ div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
+ duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
+
+ return duty * LED_FULL / div;
+}
+
+static void
+nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
+{
+ struct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
+ struct nouveau_drm *dr...
2016 Aug 23
1
[PATCH v2] drm/nouveau: add a LED driver for the NVIDIA logo
...m_dev = container_of(led, struct nouveau_led, led)->dev;
>> + struct nouveau_drm *drm = nouveau_drm(drm_dev);
>> + struct nvif_object *device = &drm->device.object;
>> + u32 div, duty;
>> +
>> + div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
>> + duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
>> +
>> + return duty * LED_FULL / div;
>> +}
>> +
>> +static void
>> +nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
>> +{
>> + struct...
2014 Sep 19
2
[PATCH 0/2] nv50, nvc0: fix weirdo zs formats and their blits
There were reports of issues with gallium-nine. It's unclear whether mesa/st
uses these, the patches did not produce any piglit changes. However they seem
right...
Ilia Mirkin (2):
nv50,nvc0: add missing depth/stencil formats to tile flag selection
nv50,nvc0: fix 3d blit logic for odd depth/stencil formats
src/gallium/drivers/nouveau/nv50/nv50_blit.h | 21 ++++++++++++++-------
2016 Aug 22
0
[PATCH v2] drm/nouveau: add a LED driver for the NVIDIA logo
...d_get_brightness(struct led_classdev *led)
+{
+ struct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
+ struct nouveau_drm *drm = nouveau_drm(drm_dev);
+ struct nvif_object *device = &drm->device.object;
+ u32 div, duty;
+
+ div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
+ duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
+
+ return duty * LED_FULL / div;
+}
+
+static void
+nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
+{
+ struct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
+ struct nouveau_drm *dr...
2016 May 03
0
[PATCH] drm/nouveau: add a LED driver for the NVIDIA logo
...truct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
> + struct nouveau_drm *drm = nouveau_drm(drm_dev);
> + struct nvif_object *device = &drm->device.object;
> + u32 div, duty;
> +
> + div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
> + duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
> +
> + return duty * LED_FULL / div;
> +}
> +
> +static void
> +nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
> +{
> + struct drm_device *drm_dev = container_of(...
2016 Aug 23
0
[PATCH v2] drm/nouveau: add a LED driver for the NVIDIA logo
...truct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
> + struct nouveau_drm *drm = nouveau_drm(drm_dev);
> + struct nvif_object *device = &drm->device.object;
> + u32 div, duty;
> +
> + div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
> + duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
> +
> + return duty * LED_FULL / div;
> +}
> +
> +static void
> +nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
> +{
> + struct drm_device *drm_dev = container_of(...
2016 May 07
0
[PATCH] drm/nouveau: add a LED driver for the NVIDIA logo
...truct drm_device *drm_dev = container_of(led, struct nouveau_led, led)->dev;
> + struct nouveau_drm *drm = nouveau_drm(drm_dev);
> + struct nvif_object *device = &drm->device.object;
> + u32 div, duty;
> +
> + div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
> + duty = nvif_rd32(device, 0x61c884) & 0x00ffffff;
> +
> + return duty * LED_FULL / div;
> +}
> +
> +static void
> +nouveau_led_set_brightness(struct led_classdev *led, enum led_brightness value)
> +{
> + struct drm_device *drm_dev = container_of(...
2020 Oct 28
2
GT710 and Nouveau on ARM/ARM64
...ridge /scb/pcie at 7d500000 ranges:
[ 1.060892] brcm-pcie fd500000.pcie: No bus range found for
/scb/pcie at 7d500000, using [bus 00-ff]
[ 1.060975] brcm-pcie fd500000.pcie: MEM
0x0600000000..0x063fffffff -> 0x00c0000000
[ 1.061061] brcm-pcie fd500000.pcie: IB MEM
0x0000000000..0x00ffffffff -> 0x0100000000
[ 1.109943] brcm-pcie fd500000.pcie: link up, 5.0 GT/s PCIe x1 (SSC)
[ 1.110129] brcm-pcie fd500000.pcie: PCI host bridge to bus 0000:00
[ 1.110159] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 1.110187] pci_bus 0000:00: root bus resource [mem
0x600000000-0x63ff...
2013 May 03
0
[PATCH V2] nouveau: Allow 3D accelerators with output ports
...fc6..d504d3c 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -60,7 +60,7 @@ static Bool NVUnmapMem(ScrnInfoPtr pScrn);
#define NOUVEAU_PCI_DEVICE(_vendor_id, _device_id) \
{ (_vendor_id), (_device_id), PCI_MATCH_ANY, PCI_MATCH_ANY, \
- 0x00030000, 0x00ffffff, 0 }
+ 0x00030000, 0x00ff0000, 0 }
static const struct pci_id_match nouveau_device_match[] = {
NOUVEAU_PCI_DEVICE(0x12d2, PCI_MATCH_ANY),
--
1.7.10.4
2009 Dec 26
2
[PATCH 1/3] drm/nouveau: Allocate a per-channel instance of NV_SW.
It will be useful for various synchronization purposes, mostly stolen
from "[PATCH] drm/nv50: synchronize user channel after buffer object
move on kernel channel" by Maarten Maathuis.
Signed-off-by: Francisco Jerez <currojerez at riseup.net>
---
drivers/gpu/drm/nouveau/nouveau_channel.c | 4 +++-
drivers/gpu/drm/nouveau/nouveau_dma.c | 17 +++++++++++++++++
2015 Jun 08
2
[PATCH RFC 05/20] pm: reorganize the nvif interface
...08x\n",
> + nv_ioctl(object, "perfmon query signal vers %d iter %08x\n",
> args->v0.version, args->v0.iter);
> di = (args->v0.iter & 0xff000000) >> 24;
> si = (args->v0.iter & 0x00ffffff) - 1;
> @@ -142,6 +142,30 @@ nvkm_perfctr_query(struct nvkm_object *object, void *data, u32 size)
> }
>
> static int
> +nvkm_perfmon_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
> +{
> + switch (mthd) {
> + case NVIF_PERFMON_V0_QUERY_SIGNAL:...
2004 Dec 02
0
tremor: macro-ize mask table
...unsigned long mask[]=
-{0x00000000,0x00000001,0x00000003,0x00000007,0x0000000f,
- 0x0000001f,0x0000003f,0x0000007f,0x000000ff,0x000001ff,
- 0x000003ff,0x000007ff,0x00000fff,0x00001fff,0x00003fff,
- 0x00007fff,0x0000ffff,0x0001ffff,0x0003ffff,0x0007ffff,
- 0x000fffff,0x001fffff,0x003fffff,0x007fffff,0x00ffffff,
- 0x01ffffff,0x03ffffff,0x07ffffff,0x0fffffff,0x1fffffff,
- 0x3fffffff,0x7fffffff,0xffffffff };
+#define MASK(b) ( (unsigned long)( (( (1<<((b)&31)) ^ (((b)&32)>>5) ) ) -1 ) \
+ & 0xffffffff )
/* spans forward, skipping as many bytes as headend is negati...
2020 Nov 03
2
GT710 and Nouveau on ARM/ARM64
...brcm-pcie fd500000.pcie: No bus range found for
> > /scb/pcie at 7d500000, using [bus 00-ff]
> > [ 1.060975] brcm-pcie fd500000.pcie: MEM
> > 0x0600000000..0x063fffffff -> 0x00c0000000
> > [ 1.061061] brcm-pcie fd500000.pcie: IB MEM
> > 0x0000000000..0x00ffffffff -> 0x0100000000
> > [ 1.109943] brcm-pcie fd500000.pcie: link up, 5.0 GT/s PCIe x1 (SSC)
> > [ 1.110129] brcm-pcie fd500000.pcie: PCI host bridge to bus 0000:00
> > [ 1.110159] pci_bus 0000:00: root bus resource [bus 00-ff]
> > [ 1.110187] pci_bus 0000:00: r...
2020 May 06
6
GeForce(R) GT 710 1GB PCIE x 1 on arm64
...e may corrupt adjacent RW1C bits
> > [ 6.482635] pci_bus 0000:00: 2-byte config write to 0000:00:01.0 offset 0x6 may corrupt adjacent RW1C bits
> > [ 6.482794] pci 0000:01:00.0: [10de:128b] type 00 class 0x030000
> > [ 6.482931] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00ffffff]
> > [ 6.482976] pci 0000:01:00.0: reg 0x14: [mem 0x00000000-0x07ffffff 64bit pref]
> > [ 6.483022] pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x01ffffff 64bit pref]
> > [ 6.483056] pci 0000:01:00.0: reg 0x24: [io 0x0000-0x007f]
> > [ 6.483087] pci 0000:01:00.0...