Timur Tabi
2025-Nov-24 23:47 UTC
[PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100
On Wed, 2025-11-19 at 15:10 -0500, Joel Fernandes wrote:> ???????? sec2_falcon.reset(bar)?; > -??????? if chipset > Chipset::GA100 { > +??????? if booter_loader.flags() == BooterFlags::Secure { > ???????????? sec2_falcon.dma_load(bar, &booter_loader)?; > ???????? } else { > ???????????? sec2_falcon.pio_load(bar, &booter_loader, None)?;The problem with this is that it conflates (Non-)Secure IMEM with using PIO/DMA. I haven't looked at GA100 yet, but it's just coincidence that platforms that have Non-Secure IMEM sections also don't have (functioning) DMA hardware.
John Hubbard
2025-Nov-24 23:55 UTC
[PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100
On 11/24/25 3:47 PM, Timur Tabi wrote:> On Wed, 2025-11-19 at 15:10 -0500, Joel Fernandes wrote: >> ???????? sec2_falcon.reset(bar)?; >> -??????? if chipset > Chipset::GA100 { >> +??????? if booter_loader.flags() == BooterFlags::Secure { >> ???????????? sec2_falcon.dma_load(bar, &booter_loader)?; >> ???????? } else { >> ???????????? sec2_falcon.pio_load(bar, &booter_loader, None)?; > > The problem with this is that it conflates (Non-)Secure IMEM with using PIO/DMA. I haven't looked > at GA100 yet, but it's just coincidence that platforms that have Non-Secure IMEM sections also don't > have (functioning) DMA hardware. >Hopper/Blackwell+ use PIO too. So the conflating could be a real concern. thanks, -- John Hubbard
Joel Fernandes
2025-Nov-25 00:05 UTC
[PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100
On 11/24/2025 6:47 PM, Timur Tabi wrote:> On Wed, 2025-11-19 at 15:10 -0500, Joel Fernandes wrote: >> ???????? sec2_falcon.reset(bar)?; >> -??????? if chipset > Chipset::GA100 { >> +??????? if booter_loader.flags() == BooterFlags::Secure { >> ???????????? sec2_falcon.dma_load(bar, &booter_loader)?; >> ???????? } else { >> ???????????? sec2_falcon.pio_load(bar, &booter_loader, None)?; > > The problem with this is that it conflates (Non-)Secure IMEM with using PIO/DMA. I haven't looked > at GA100 yet, but it's just coincidence that platforms that have Non-Secure IMEM sections also don't > have (functioning) DMA hardware. >Sure, I am also Ok with the chipset check happening in a single place as we were discussing in the other thread, and setup BooterFlags there (and then check here) to say that DMA load is needed. Thanks.