Nouveau - Mar 2013 - Fix unaligned accesses for SPARC

The nouveau driver makes a number of unaligned accesses via the ROM16(),
ROM32() and ROM64() macros which fault on SPARC (but would be transparently
handled by x86 hardware). Making use of get_unaligned() macro fixes the
problem for me.

diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h
b/drivers/gpu/drm/nouveau/nouveau_bios.h
index 7ccd28f..92031f6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
@@ -26,6 +26,8 @@

 #include "nvreg.h"

+#include <asm/unaligned.h>
+
 #define DCB_MAX_NUM_ENTRIES 16
 #define DCB_MAX_NUM_I2C_ENTRIES 16
 #define DCB_MAX_NUM_GPIO_ENTRIES 32
@@ -33,10 +35,10 @@

 #define DCB_LOC_ON_CHIP 0

-#define ROM16(x) le16_to_cpu(*(u16 *)&(x))
-#define ROM32(x) le32_to_cpu(*(u32 *)&(x))
+#define ROM16(x) le16_to_cpu(get_unaligned((u16 *)&(x)))
+#define ROM32(x) le32_to_cpu(get_unaligned((u32 *)&(x)))
 #define ROM48(x) ({ u8 *p = &(x); (u64)ROM16(p[4]) << 32 |
ROM32(p[0]); })
-#define ROM64(x) le64_to_cpu(*(u64 *)&(x))
+#define ROM64(x) le64_to_cpu(get_unaligned((u64 *)&(x)))
 #define ROMPTR(d,x) ({            \
        struct nouveau_drm *drm = nouveau_drm((d)); \
        ROM16(x) ? &drm->vbios.data[ROM16(x)] : NULL; \
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On Tue, Mar 12, 2013 at 10:18:41PM -0500, Patrick Baggett
wrote:
>    The nouveau driver makes a number of unaligned accesses via the
>    ROM16(), ROM32() and ROM64() macros which fault on SPARC (but would be
>    transparently handled by x86 hardware). Making use of get_unaligned()
>    macro fixes the problem for me.
> 
>    diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h
>    b/drivers/gpu/drm/nouveau/nouveau_bios.h
>    index 7ccd28f..92031f6 100644
>    --- a/drivers/gpu/drm/nouveau/nouveau_bios.h
>    +++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
>    @@ -26,6 +26,8 @@
>     #include "nvreg.h"
>    +#include <asm/unaligned.h>
>    +
>     #define DCB_MAX_NUM_ENTRIES 16
>     #define DCB_MAX_NUM_I2C_ENTRIES 16
>     #define DCB_MAX_NUM_GPIO_ENTRIES 32
>    @@ -33,10 +35,10 @@
>     #define DCB_LOC_ON_CHIP 0
>    -#define ROM16(x) le16_to_cpu(*(u16 *)&(x))
>    -#define ROM32(x) le32_to_cpu(*(u32 *)&(x))
>    +#define ROM16(x) le16_to_cpu(get_unaligned((u16 *)&(x)))
>    +#define ROM32(x) le32_to_cpu(get_unaligned((u32 *)&(x)))
>     #define ROM48(x) ({ u8 *p = &(x); (u64)ROM16(p[4]) << 32 |
>    ROM32(p[0]); })
>    -#define ROM64(x) le64_to_cpu(*(u64 *)&(x))
>    +#define ROM64(x) le64_to_cpu(get_unaligned((u64 *)&(x)))
>     #define ROMPTR(d,x) ({            \
>            struct nouveau_drm *drm = nouveau_drm((d)); \
>            ROM16(x) ? &drm->vbios.data[ROM16(x)] : NULL; \
Please take a look at Documentation/SubmittingPatches and resubmit after
adapting.

IMHO, I think you should submit this patch only once you figure out how to
correctly boot and use at least basic accelerated operations, because I'm
not
100% sure this is correct - 1. you have other severe issues with nouveau which
may or may not be connected to this code, 2. sparc defines get_unaligned to
__get_unaligned_be, so maybe you need to use _le variant? or maybe use
get_unaligned_le* without le*_to_cpu?.

Marcin