최유호[ 대학원석사과정재학 / 자동차융합학과 ] via llvm-dev
2021-Oct-20 15:41 UTC
[llvm-dev] LLVM RISC-V ISA Extension related question
To whom it may concern. Hi, I'm James. I would like to ask you a question about the ISA Extension of RISC-V. I am currently working on adding MAC (Multiply-ACcumulate) instruction to the LLVM backend compiler. As far as I know, the sequence of steps that I should follow is adding an intrinsic to recognize the IR pattern for MAC instruction and instruction addition for generating MAC instructions as assembly code. Further jobs are required for gcc-assembler but this is not the concern right now. Any clue or hint would sincerely be appreciated. Thanks in advance. Kind regards. James. ------------------------------------------------------ Yuho Choi. M.S. Course Compiler and Microarchitecture Lab. School of Electrical and Computer Engineering, Korea University, Seoul, Korea Tel: 82-2-3290-3794 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20211021/9e243c63/attachment.html>