bagel via llvm-dev
2021-Apr-27 20:55 UTC
[llvm-dev] need explanation for some code in DAGCombiner::useDivRem
I have a target for which UDIV/SDIV is legal, UMOD/SMOD requires an instruction prefix a divide instruction, and UDIVMOD/SDIVMOD is the same as UMOD/SMOD. In DAGCombiner::useDivRem there is this code: // If div is legal, it's better to do the normal expansion unsigned OtherOpcode = 0; if ((Opcode == ISD::SDIV) || (Opcode == ISD::UDIV)) { OtherOpcode = isSigned ? ISD::SREM : ISD::UREM; if (TLI.isOperationLegalOrCustom(Opcode, VT)) return SDValue(); } else { OtherOpcode = isSigned ? ISD::SDIV : ISD::UDIV; if (TLI.isOperationLegalOrCustom(OtherOpcode, VT)) return SDValue(); } This prevents generation of UDIVMOD/SDIVMOD because UDIV/SDIV is legal. Why is this check made? An what does "it's better to do the normal expansion" mean? Thanks, brian