This sounds very similar to what PowerPC does, see: https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp However, PowerPC is doing this in the compiler backend, not in the assembler. One issue is that the process must be iterative, because branches can go both forward and backward, and replacing some branch instructions with the branch pairs can then cause other branches to go out of range. -Hal On 10/5/20 10:20 PM, Kai Wang via llvm-dev wrote:> Correct the title. > > On Tue, Oct 6, 2020 at 11:11 AM Kai Wang <kai.wang at sifive.com > <mailto:kai.wang at sifive.com>> wrote: > > Hi all, > > In RISC-V ISA, the range of conditional branches is within 4KiB. > In current implementation, if the branch target is out of range, > LLVM MC will issue an error message to tell users it could not > resolve the fixup record. I have compared the result with the GNU > assembler. GNU assembler will convert the branch to inverted one > plus jump to make the branch possible. The range of unconditional > jump is 1MiB. It looks like > > ########################## > bne a0, a1, FAR_BRANCH > … > FAR_BRANCH: > > converted to > > ########################## > beq a0, a1, SKIP_J > j FAR_BRANCH > SKIP_J: > … > FAR_BRANCH: > > I found there is a target hook, relaxInstruction, that tries to > achieve the similar goal. However, the target hook only replaces > one MCInst with another one with a larger branch range. For > example, c.beqz will be converted to beq in the RISC-V backend if > the fixup value is out of range. There seems no target hook to > convert one MCInst to a complex pattern in LLVM MC. Do I miss > something obvious? > > I found there is a target hook, finishLayout, to manipulate the > code generated. Does it make sense to implement the feature in > finishLayout? Or is there any better idea to achieve the > conversion? Thanks a lot. > > Best, > Kai > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-- Hal Finkel Lead, Compiler Technology and Programming Languages Leadership Computing Facility Argonne National Laboratory -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20201006/51ad78cb/attachment.html>
Anton Korobeynikov via llvm-dev
2020-Oct-06 09:46 UTC
[llvm-dev] Questions about relaxation in MC
And... MSP430 has the similar code :) On Tue, Oct 6, 2020 at 11:14 AM Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote:> > This sounds very similar to what PowerPC does, see: https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp > > However, PowerPC is doing this in the compiler backend, not in the assembler. One issue is that the process must be iterative, because branches can go both forward and backward, and replacing some branch instructions with the branch pairs can then cause other branches to go out of range. > > -Hal > > On 10/5/20 10:20 PM, Kai Wang via llvm-dev wrote: > > Correct the title. > > On Tue, Oct 6, 2020 at 11:11 AM Kai Wang <kai.wang at sifive.com> wrote: >> >> Hi all, >> >> In RISC-V ISA, the range of conditional branches is within 4KiB. In current implementation, if the branch target is out of range, LLVM MC will issue an error message to tell users it could not resolve the fixup record. I have compared the result with the GNU assembler. GNU assembler will convert the branch to inverted one plus jump to make the branch possible. The range of unconditional jump is 1MiB. It looks like >> >> ########################## >> bne a0, a1, FAR_BRANCH >> … >> FAR_BRANCH: >> >> converted to >> >> ########################## >> beq a0, a1, SKIP_J >> j FAR_BRANCH >> SKIP_J: >> … >> FAR_BRANCH: >> >> I found there is a target hook, relaxInstruction, that tries to achieve the similar goal. However, the target hook only replaces one MCInst with another one with a larger branch range. For example, c.beqz will be converted to beq in the RISC-V backend if the fixup value is out of range. There seems no target hook to convert one MCInst to a complex pattern in LLVM MC. Do I miss something obvious? >> >> I found there is a target hook, finishLayout, to manipulate the code generated. Does it make sense to implement the feature in finishLayout? Or is there any better idea to achieve the conversion? Thanks a lot. >> >> Best, >> Kai > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > -- > Hal Finkel > Lead, Compiler Technology and Programming Languages > Leadership Computing Facility > Argonne National Laboratory > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-- With best regards, Anton Korobeynikov Department of Statistical Modelling, Saint Petersburg State University
Hi Hal, Thanks for your information. If the input source is assembly code, is there any chance to do the similar thing? MC assembler seems to scan the assembly code one by one and convert them to MCInsts. Then do the assembler work, i.e., put MCInsts into fragments, generate fixups if needed, relaxation, code emission, etc. -Kai On Tue, Oct 6, 2020 at 4:14 PM Hal Finkel <hfinkel at anl.gov> wrote:> This sounds very similar to what PowerPC does, see: > https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp > > However, PowerPC is doing this in the compiler backend, not in the > assembler. One issue is that the process must be iterative, because > branches can go both forward and backward, and replacing some branch > instructions with the branch pairs can then cause other branches to go out > of range. > > -Hal > On 10/5/20 10:20 PM, Kai Wang via llvm-dev wrote: > > Correct the title. > > On Tue, Oct 6, 2020 at 11:11 AM Kai Wang <kai.wang at sifive.com> wrote: > >> Hi all, >> >> In RISC-V ISA, the range of conditional branches is within 4KiB. In >> current implementation, if the branch target is out of range, LLVM MC will >> issue an error message to tell users it could not resolve the fixup record. >> I have compared the result with the GNU assembler. GNU assembler will >> convert the branch to inverted one plus jump to make the branch possible. >> The range of unconditional jump is 1MiB. It looks like >> >> ########################## >> bne a0, a1, FAR_BRANCH >> … >> FAR_BRANCH: >> >> converted to >> >> ########################## >> beq a0, a1, SKIP_J >> j FAR_BRANCH >> SKIP_J: >> … >> FAR_BRANCH: >> >> I found there is a target hook, relaxInstruction, that tries to achieve >> the similar goal. However, the target hook only replaces one MCInst with >> another one with a larger branch range. For example, c.beqz will be >> converted to beq in the RISC-V backend if the fixup value is out of range. >> There seems no target hook to convert one MCInst to a complex pattern in >> LLVM MC. Do I miss something obvious? >> >> I found there is a target hook, finishLayout, to manipulate the code >> generated. Does it make sense to implement the feature in finishLayout? Or >> is there any better idea to achieve the conversion? Thanks a lot. >> >> Best, >> Kai >> > > _______________________________________________ > LLVM Developers mailing listllvm-dev at lists.llvm.orghttps://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > -- > Hal Finkel > Lead, Compiler Technology and Programming Languages > Leadership Computing Facility > Argonne National Laboratory > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20201007/713f5eb2/attachment.html>
Hi Anton, Thanks for your information. I will look into MSP430. -Kai On Tue, Oct 6, 2020 at 5:46 PM Anton Korobeynikov <anton at korobeynikov.info> wrote:> And... MSP430 has the similar code :) > > On Tue, Oct 6, 2020 at 11:14 AM Hal Finkel via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > > > This sounds very similar to what PowerPC does, see: > https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp > > > > However, PowerPC is doing this in the compiler backend, not in the > assembler. One issue is that the process must be iterative, because > branches can go both forward and backward, and replacing some branch > instructions with the branch pairs can then cause other branches to go out > of range. > > > > -Hal > > > > On 10/5/20 10:20 PM, Kai Wang via llvm-dev wrote: > > > > Correct the title. > > > > On Tue, Oct 6, 2020 at 11:11 AM Kai Wang <kai.wang at sifive.com> wrote: > >> > >> Hi all, > >> > >> In RISC-V ISA, the range of conditional branches is within 4KiB. In > current implementation, if the branch target is out of range, LLVM MC will > issue an error message to tell users it could not resolve the fixup record. > I have compared the result with the GNU assembler. GNU assembler will > convert the branch to inverted one plus jump to make the branch possible. > The range of unconditional jump is 1MiB. It looks like > >> > >> ########################## > >> bne a0, a1, FAR_BRANCH > >> … > >> FAR_BRANCH: > >> > >> converted to > >> > >> ########################## > >> beq a0, a1, SKIP_J > >> j FAR_BRANCH > >> SKIP_J: > >> … > >> FAR_BRANCH: > >> > >> I found there is a target hook, relaxInstruction, that tries to achieve > the similar goal. However, the target hook only replaces one MCInst with > another one with a larger branch range. For example, c.beqz will be > converted to beq in the RISC-V backend if the fixup value is out of range. > There seems no target hook to convert one MCInst to a complex pattern in > LLVM MC. Do I miss something obvious? > >> > >> I found there is a target hook, finishLayout, to manipulate the code > generated. Does it make sense to implement the feature in finishLayout? Or > is there any better idea to achieve the conversion? Thanks a lot. > >> > >> Best, > >> Kai > > > > > > _______________________________________________ > > LLVM Developers mailing list > > llvm-dev at lists.llvm.org > > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > > > -- > > Hal Finkel > > Lead, Compiler Technology and Programming Languages > > Leadership Computing Facility > > Argonne National Laboratory > > > > _______________________________________________ > > LLVM Developers mailing list > > llvm-dev at lists.llvm.org > > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > > > -- > With best regards, Anton Korobeynikov > Department of Statistical Modelling, Saint Petersburg State University >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20201007/25382564/attachment.html>