Certainly a calculator supports arithmetic :-) The TI 58/59 support things such as 1 3 STO IND 02 which, if memory 02 currently holds "42", will store 13 into memory 42. So, yes, there are pointers. And address arithmetic. On Wed, Mar 14, 2018 at 11:30 AM, Friedman, Eli via llvm-dev < llvm-dev at lists.llvm.org> wrote:> On 3/14/2018 8:53 AM, via llvm-dev wrote: > >> Hello, >> >> I am a new comer to llvm framework. I read quite many tutorials but I am >> still not able to determine whether llvm can be used for my project: >> implementing a backend for the famous Texas Instruments 59 Calculator (sold >> from 1977 to 1982). >> >> This is not a CPU but it uses a kind of bytecode that is interpreted (see >> examples in http://ti59compiler.wixsite.com/ti59/t-compiler). It has no >> stack, no frame, only floating point registers. The memory is split between >> program (up to 960 steps) and registers (up to 100). A register consumes 8 >> program steps, reducing the program size accordingly. >> >> The most tricky part is the following: a simple instruction like MOV R1,N >> may require more or less bytes to be coded. For instance: >> >> MOV R1,1 will require 3 bytes: (key) 1, STO, 01. >> MOV R2,345 will require 5 bytes: (key) 3, (key) 4, (key) 5, STO, 02. >> >> How to cope with such an instruction? Can llvm be used to generate the >> right bytecode? >> > > From your description, it sounds like the architecture doesn't support > pointers or integer arithmetic; that probably makes it impossible to write > a usable LLVM backend. > > Instruction sets with with multiple instruction sizes are relatively > common; x86, Thumb2, microMIPS, and RISCV all fall into this category. > > -Eli > > -- > Employee of Qualcomm Innovation Center, Inc. > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux > Foundation Collaborative Project > > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180314/f6a42651/attachment-0001.html>
Hello Bruce and Eli, Yes, you are definitely right: indirect access to registers is possible through IND XX instruction. So, no worry on that side. My concern is about STO instruction description in TI59InstrInfo.td file. It looks impossible to me to categorize this instruction as a "classical" N-bytes long instruction (as N fully depends on the value you want to store). Could it be a show stopper to implement a backend ? BR Philippe ----- Mail original ----- De: "Bruce Hoult" <bruce at hoult.org> À: "Eli Friedman" <efriedma at codeaurora.org> Cc: "philippe tivolle" <philippe.tivolle at free.fr>, "llvm-dev" <llvm-dev at lists.llvm.org>, "eric garreau" <eric.garreau at gemalto.com> Envoyé: Mercredi 14 Mars 2018 19:37:35 Objet: Re: [llvm-dev] TI 59 backend Certainly a calculator supports arithmetic :-) The TI 58/59 support things such as 1 3 STO IND 02 which, if memory 02 currently holds "42", will store 13 into memory 42. So, yes, there are pointers. And address arithmetic. On Wed, Mar 14, 2018 at 11:30 AM, Friedman, Eli via llvm-dev < llvm-dev at lists.llvm.org > wrote: On 3/14/2018 8:53 AM, via llvm-dev wrote: Hello, I am a new comer to llvm framework. I read quite many tutorials but I am still not able to determine whether llvm can be used for my project: implementing a backend for the famous Texas Instruments 59 Calculator (sold from 1977 to 1982). This is not a CPU but it uses a kind of bytecode that is interpreted (see examples in http://ti59compiler.wixsite.com/ti59/t-compiler ). It has no stack, no frame, only floating point registers. The memory is split between program (up to 960 steps) and registers (up to 100). A register consumes 8 program steps, reducing the program size accordingly. The most tricky part is the following: a simple instruction like MOV R1,N may require more or less bytes to be coded. For instance: MOV R1,1 will require 3 bytes: (key) 1, STO, 01. MOV R2,345 will require 5 bytes: (key) 3, (key) 4, (key) 5, STO, 02. How to cope with such an instruction? Can llvm be used to generate the right bytecode?>From your description, it sounds like the architecture doesn't support pointers or integer arithmetic; that probably makes it impossible to write a usable LLVM backend.Instruction sets with with multiple instruction sizes are relatively common; x86, Thumb2, microMIPS, and RISCV all fall into this category. -Eli -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
On 3/14/2018 12:05 PM, philippe.tivolle at free.fr wrote:> Hello Bruce and Eli, > > Yes, you are definitely right: indirect access to registers is possible through IND XX instruction. So, no worry on that side.Oh, okay, I didn't look closely.> My concern is about STO instruction description in TI59InstrInfo.td file. It looks impossible to me to categorize this instruction as a "classical" N-bytes long instruction (as N fully depends on the value you want to store). Could it be a show stopper to implement a backend ?It should be easy to handle: just treat it as three different instructions, each of which has a fixed size. -Eli -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project