llvm dev - Oct 2016 - Update on the status of the AVR backend

Hello all,

The AVR backend is now almost fully upstreamed. Krzysztof and Matt A have
done an awesome job at reviewing all of the patches promptly and
comprehensively.

What has been merged:

   - Almost all of the machine code backend (including the ELF object file
   writer)
   - The assembly parser
   - The assembly printer
   - The definitions for a few hundred different microcontroller definitions
   - Al of the register definitions
   - Most of the instruction selection code
   - The call frame lowering code
   - The CodeGen -> MachineCode glue
   - Definitions for all but two of the entire instruction set (we’re
   missing the load/store instructions that are for the AVR Tiny core only)
   - Calling convention definitions and lowering
   - Support for the lo8(symbol), hi8(symbol) assembler macros and
   relocations

What is still waiting:

   - The two core instruction selection classes (AVRISelLowering
   <https://reviews.llvm.org/D25034>, AVRISelDAGToDAG
   <https://reviews.llvm.org/D25278>)
   - The branch relaxation pass (which will be rewritten to use the generic
   relaxation pass before it is merged)
   - The pseudo instruction expansion pass (required for *most* programs)
   - The disassembler (currently only half written)
   - A fix to the greedy register allocator to fix an assertion error for
   very small register classes (D25070 <https://reviews.llvm.org/D25070>)

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