Iulia Stirb via llvm-dev
2015-Dec-16 16:02 UTC
[llvm-dev] Instruction scheduling done before or after register allocation
Hi, I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation | | | | | | | | | | | The LLVM Target-Independent Code Generator — LLVM 3...Instruction Selection Instruction Selection is the process of translating LLVM code presented to thecode generator into target-specific machine instructions. | | | | View on llvm.org | Preview by Yahoo | | | | | Could you please confirm that on actual implementation of LLVM's code generator, the instruction scheduling is done before register allocation? Many thanks,Iulia Stirb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151216/2e02f43f/attachment.html>
Quentin Colombet via llvm-dev
2015-Dec-16 17:06 UTC
[llvm-dev] Instruction scheduling done before or after register allocation
Hi,> On Dec 16, 2015, at 8:02 AM, Iulia Stirb via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation <http://llvm.org/docs/CodeGenerator.html#the-high-level-design-of-the-code-generator> > > > <http://llvm.org/docs/CodeGenerator.html#the-high-level-design-of-the-code-generator> > > > > > > The LLVM Target-Independent Code Generator — LLVM 3... > <http://llvm.org/docs/CodeGenerator.html#the-high-level-design-of-the-code-generator>Instruction Selection Instruction Selection is the process of translating LLVM code presented to the code generator into target-specific machine instructions. > View on llvm.org <http://llvm.org/docs/CodeGenerator.html#the-high-level-design-of-the-code-generator> > Preview by Yahoo > > > Could you please confirm that on actual implementation of LLVM's code generator, the instruction scheduling is done before register allocation?This is correct. Cheers, Quentin> > Many thanks, > Iulia Stirb > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151216/8c1f4b4e/attachment-0001.html>
Matthias Braun via llvm-dev
2015-Dec-16 19:00 UTC
[llvm-dev] Instruction scheduling done before or after register allocation
Well we do both, we schedule before and after register allocation. Most targets use the MachineScheduler before register allocation and some opt in to the PostMachineScheduler after register allocation. You can look at the enableMachineScheduler() and enablePostMachineScheduler() methods. -Matthias> On Dec 16, 2015, at 9:06 AM, Quentin Colombet via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > >> On Dec 16, 2015, at 8:02 AM, Iulia Stirb via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi, >> >> I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation >> >> >> >> >> >> >> >> >> The LLVM Target-Independent Code Generator — LLVM 3... >> Instruction Selection Instruction Selection is the process of translating LLVM code presented to the code generator into target-specific machine instructions. >> View on llvm.org >> Preview by Yahoo >> >> >> Could you please confirm that on actual implementation of LLVM's code generator, the instruction scheduling is done before register allocation? > > This is correct. > > Cheers, > Quentin > >> >> Many thanks, >> Iulia Stirb >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151216/b6f632d6/attachment.html>