llvm dev - Mar 2015 - [LLVMdev] variable_ops in RET?

Hi guys,

I'm running into the following assert in InstrEmiiter::EmitMachineNode()
with the RET instruction:

#ifndef NDEBUG
               Unsigned NumMIOperands = NodeOperands + NumResults;
               if (II.isVariadic())
               {
                              assert(NumMIOperands >= II.getNumOperands()
&&
                                          "Too few operands for a variadic
node!");
               }
               else
               {
                              assert(NumMIOperands >= II.getNumOperands()
&&
NumMIOperands <= II.getNumOperands() + II.getNumImplicitDefs() + NumImpUses
&&
            "#operands for dag node doesn't match .td file!");
}
#endif

And the reason seems to be that "NumImpUses" only takes into account
the number of the physical registers?

The pattern we have for RET is

Let isTerminator =1, isReturn =1 in
{
               Multiclass __RET< SDNode node, Opcode op, string asmstr> {
                              def : OP <op, 0, (outs), (ins),
!strconcat(asmstr, " "), [(node)]>;
               }
}

If I added "variable_ops" for the ins, it seems to then go to the
"isvariadic" path without hitting the assert.

Let isTerminator =1, isReturn =1 in
{
               Multiclass __RET< SDNode node, Opcode op, string asmstr> {
                              def : OP <op, 0, (outs), (ins variable_ops),
!strconcat(asmstr, " "), [(node)]>;
               }
}


Does this approach sound reasonable? I noticed that the "variable_ops"
has been removed for CALL instructions for many backends. I was wondering if
this is not going to be supported by RET either?

Thanks a lot,
- Chad
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