Gordon Keiser
2015-Mar-25 12:24 UTC
[LLVMdev] Is anyone interested in work on a Fujitsu FR series backend?
This processor doesn't have much exposure, and IDA's disassembly module doesn't even properly decode many of the instructions. The processors themselves have very small instruction sets, fixed-width 16 bit instructions outside of 3 immediate loads, and are mostly used as GUI / interface processors in various digital cameras from Pentax, Nikon, and possibly Canon (I've only paid attention to the Pentax and Nikon end). Lately I've had an itch to work on a more major project, and I'm comfortable enough with Tablegen that I feel like I could get most of the work done there in a relatively short time. Another custom tablegen parser will be more of a learning curve if needed. There are very few "special case" instructions; the "instruction formats" list in their contains 6 items. As far as I can remember the only custom emission needed would be for the DIV sequence, which requires something like this for signed division: DIV0S DIV1x32 DIV2 DIV3 DIV4S Delay slots are a potentially interesting challenge, although I believe some other backend supports them already (which one is escaping me at the moment). Anyway, my big questions are: 1) Would anyone be interested in this other than as a toy backend? It may be useful for learning because of general simplicity. 2) Is anyone from Fujitsu here that cares about this or would be interested in working on it? I still need to mail them and check into their policy on releasing their full docs (they used to be publically available, then disappeared for a while), but it seems fairly public at this point. 3) What would we test it on exactly? ARM boards are easy to come by, as are PPC, Intel, etc. I'm not sure of the state of Fujitsu boards that aren't highly integrated, although I assume they have an emulator somewhere. For right now this seems like an out-of-tree project or example but I thought I'd see if I could spark some interest here before I begin messing with it. As disclosure I'll also mention that this would be a side project for me, not work related. I feel like this processor is "elegant" enough, with 135 total instructions, that it could be a good learning tool. Learning TableGen based on the ARM backend was a large task, as was piecing the other parts of it together to the point where I could fix anything with a reasonable degree of certainty. A small, simple processor might be good for teaching purposes as a stepping stone if nothing else. Gordon Keiser Software Development Engineer Arxan Technologies -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150325/a7f67968/attachment.html>
Gordon Keiser
2015-Mar-25 12:50 UTC
[LLVMdev] Is anyone interested in work on a Fujitsu FR series backend?
I'm a bit out of date I'm afraid, as Fujitsu sold their microcontroller division to Spansion which is still manufacturing the old FR series under a different name. http://www.spansion.com/Products/microcontrollers/32-bit-Proprietary-Core/Pages/overview_32bit.aspx -Gordon From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Gordon Keiser Sent: Wednesday, March 25, 2015 8:25 AM To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] Is anyone interested in work on a Fujitsu FR series backend? This processor doesn't have much exposure, and IDA's disassembly module doesn't even properly decode many of the instructions. The processors themselves have very small instruction sets, fixed-width 16 bit instructions outside of 3 immediate loads, and are mostly used as GUI / interface processors in various digital cameras from Pentax, Nikon, and possibly Canon (I've only paid attention to the Pentax and Nikon end). Lately I've had an itch to work on a more major project, and I'm comfortable enough with Tablegen that I feel like I could get most of the work done there in a relatively short time. Another custom tablegen parser will be more of a learning curve if needed. There are very few "special case" instructions; the "instruction formats" list in their contains 6 items. As far as I can remember the only custom emission needed would be for the DIV sequence, which requires something like this for signed division: DIV0S DIV1x32 DIV2 DIV3 DIV4S Delay slots are a potentially interesting challenge, although I believe some other backend supports them already (which one is escaping me at the moment). Anyway, my big questions are: 1) Would anyone be interested in this other than as a toy backend? It may be useful for learning because of general simplicity. 2) Is anyone from Fujitsu here that cares about this or would be interested in working on it? I still need to mail them and check into their policy on releasing their full docs (they used to be publically available, then disappeared for a while), but it seems fairly public at this point. 3) What would we test it on exactly? ARM boards are easy to come by, as are PPC, Intel, etc. I'm not sure of the state of Fujitsu boards that aren't highly integrated, although I assume they have an emulator somewhere. For right now this seems like an out-of-tree project or example but I thought I'd see if I could spark some interest here before I begin messing with it. As disclosure I'll also mention that this would be a side project for me, not work related. I feel like this processor is "elegant" enough, with 135 total instructions, that it could be a good learning tool. Learning TableGen based on the ARM backend was a large task, as was piecing the other parts of it together to the point where I could fix anything with a reasonable degree of certainty. A small, simple processor might be good for teaching purposes as a stepping stone if nothing else. Gordon Keiser Software Development Engineer Arxan Technologies