Tae Jun Ham
2015-Mar-21 06:37 UTC
[LLVMdev] Question on Inline Assembly Code generation for X64
Hi,
I have a question on inline assembly code generation for X64.
I have following LLVM IR :
%c = fsub fast float %a, %b
tail call void asm sideeffect "mov $0, %eax \0A\09 movd $1, %xmm0 \0A\09
xchg %dx, %dx\0A", "ir,r,~{ax}"(i32 100, float %c)
The assembly that I get for this part of the code is as follows (x64 target).
*xchgw %dx, %dx is a nop that I am using to do some stuff in binary translator.
subss %xmm1, %xmm0
movd %xmm0, %edi
#APP
movl $25, %eax
movd %edi, %xmm0
xchgw %dx, %dx
What I wanted/expected was following :
subss %xmm1, %xmm0
#APP
movl $25, %eax
movd %xmm0, %xmm0
xchgw %dx, %dx
What would be the proper way to get the output I want ?
Thank you
--
Tae Jun Ham
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mats petersson
2015-Mar-21 08:31 UTC
[LLVMdev] Question on Inline Assembly Code generation for X64
I'm fairly sure you need the register definition to be "Y0" or something like that for the input operand to be XMM0. -- Mats On 21 March 2015 at 06:37, Tae Jun Ham <ham.taejun at gmail.com> wrote:> Hi, > > I have a question on inline assembly code generation for X64. > > I have following LLVM IR : > > %c = fsub fast float %a, %b > tail call void asm sideeffect "mov $0, %eax \0A\09 movd $1, %xmm0 \0A\09 > xchg %dx, %dx\0A", "ir,r,~{ax}"(i32 100, float %c) > > The assembly that I get for this part of the code is as follows (x64 > target). > *xchgw %dx, %dx is a nop that I am using to do some stuff in binary > translator. > > subss %xmm1, %xmm0 > movd %xmm0, %edi > #APP > movl $25, %eax > movd %edi, %xmm0 > xchgw %dx, %dx > > What I wanted/expected was following : > > subss %xmm1, %xmm0 > #APP > movl $25, %eax > movd %xmm0, %xmm0 > xchgw %dx, %dx > > What would be the proper way to get the output I want ? > > Thank you > -- > Tae Jun Ham > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >