llvm dev - Aug 2013 - [LLVMdev] How to eliminate duplicated load/store IR in LLVM?

Hi,
    We are writing a binary translator with LLVM. There are a lot of
duplicated load/store IR instruction generated by our binary translator.
    Is there any kind of optimization pass which can eliminate those
duplicated load/store instruction? We know that this kind of optimization
can be harmful under some circumstances such as multi-threading, but it's
safe in our model.



Bin LI,
State Key Laboratory of Computer Architecture,
Institute of Computing Technology of Chinese Academy of Sciences,
Address: NO.6 Kexueyuan South Road, Haidian District, Beijing, China
email: richardustc at gmail.com
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Depending on the situation, you either want to use mem2reg or GVN.

Sent from my iPhone

On Aug 13, 2013, at 1:02 AM, "Li Bin" <richardustc at
gmail.com<mailto:richardustc at gmail.com>> wrote:

Hi,
    We are writing a binary translator with LLVM. There are a lot of duplicated
load/store IR instruction generated by our binary translator.
    Is there any kind of optimization pass which can eliminate those duplicated
load/store instruction? We know that this kind of optimization can be harmful
under some circumstances such as multi-threading, but it's safe in our
model.



Bin LI,
State Key Laboratory of Computer Architecture,
Institute of Computing Technology of Chinese Academy of Sciences,
Address: NO.6 Kexueyuan South Road, Haidian District, Beijing, China
email: richardustc at gmail.com<mailto:richardustc at gmail.com>
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We are able to optimize stack memory multi-load/store and constant
global variable multi-load with O3 optimization, but we cannot optimize
ordinary global variable multi-load/store. mem2reg and gvn optimizations
are already included in O3 option.
    Is there anything we missed?


--

Bin LI,
State Key Laboratory of Computer Architecture,
Institute of Computing Technology of Chinese Academy of Sciences,
Address: NO.6 Kexueyuan South Road, Haidian District, Beijing, China
email: richardustc at gmail.com


2013/8/13 Criswell, John T <criswell at illinois.edu>
>  Depending on the situation, you either want to use mem2reg or GVN.
>
> Sent from my iPhone
>
> On Aug 13, 2013, at 1:02 AM, "Li Bin" <richardustc at
gmail.com> wrote:
>
>   Hi,
>     We are writing a binary translator with LLVM. There are a lot of
> duplicated load/store IR instruction generated by our binary translator.
>     Is there any kind of optimization pass which can eliminate those
> duplicated load/store instruction? We know that this kind of optimization
> can be harmful under some circumstances such as multi-threading, but
it's
> safe in our model.
>
>
>
>  Bin LI,
> State Key Laboratory of Computer Architecture,
> Institute of Computing Technology of Chinese Academy of Sciences,
> Address: NO.6 Kexueyuan South Road, Haidian District, Beijing, China
> email: richardustc at gmail.com
>
>  _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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