llvm dev - May 2013 - [LLVMdev] Thumb call relocation for the Runtime dynamic linker (RuntimeDyldELF.cpp)

Hello,

here is a patch to add Thumb call relocation to the dynamic linker. I would
be happy if you could commit it to the SVN.

Thank you, Jonas
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Hi Jonas,
> here is a patch to add Thumb call relocation to the dynamic linker. I would
be happy if you could commit it to the SVN.
Thanks very much for working on this. It looks like a good starting-point, but
there are a couple of issues with the patch at the moment.

First, it only handles RelValue up to 22 bits (depending on how you count) in
size. But on ARMv6T2 onwards the J1 and J2 fields of the instruction form part
of the immediate. Technically, I think a linker is allowed to do what you've
done so it's probably good enough for now as long as we put an assertion
into the code that RelType isn't too big.

Second, I don't think it handles BLX correctly. When used on a BLX the
instruction is assumed to be at "Align(PC, 4)" rather than just
"PC". I *think* this means that if the BLX instruction was at an
address "== 2 (mod 4)" then your code would set the 'H' bit
and create an undefined instruction.

Finally, it would be very good to have some tests for the patch. Or does it help
out on normal regression tests when you set the MCJIT's default triple to
thumbv7?

Tim.

(P.S. we normally send all patches to the llvm-commits mailing list with
something like "[PATCH]" in the subject. Odd, but just how LLVM
evolved I suppose. I've added them on CC).

Hi Tim,

thanks for the advice, I will rework my patch to be conformant to Thumb2
specifications, and have a look at the testing, and then resubmit.

Jonas

On Friday, May 24, 2013, Tim Northover wrote:
> Hi Jonas,
>
> > here is a patch to add Thumb call relocation to the dynamic linker. I
> would be happy if you could commit it to the SVN.
>
> Thanks very much for working on this. It looks like a good starting-point,
> but there are a couple of issues with the patch at the moment.
>
> First, it only handles RelValue up to 22 bits (depending on how you count)
> in size. But on ARMv6T2 onwards the J1 and J2 fields of the instruction
> form part of the immediate. Technically, I think a linker is allowed to do
> what you've done so it's probably good enough for now as long as we
put an
> assertion into the code that RelType isn't too big.
>
> Second, I don't think it handles BLX correctly. When used on a BLX the
> instruction is assumed to be at "Align(PC, 4)" rather than just
"PC". I
> *think* this means that if the BLX instruction was at an address "== 2
(mod
> 4)" then your code would set the 'H' bit and create an
undefined
> instruction.
>
> Finally, it would be very good to have some tests for the patch. Or does
> it help out on normal regression tests when you set the MCJIT's default
> triple to thumbv7?
>
> Tim.
>
> (P.S. we normally send all patches to the llvm-commits mailing list with
> something like "[PATCH]" in the subject. Odd, but just how LLVM
evolved I
> suppose. I've added them on CC).
>
>
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