Hi,
For the following case,
$ cat bad1.ll
target datalayout
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
define internal void @test(i32 %v) {
entry:
%tmp = alloca i32, align 4
store i32 %v, i32* %tmp, align 4
%0 = bitcast i32* %tmp to <2 x i8>*
%1 = load <2 x i8>* %0, align 4
ret void
}
I have the following failure message for command line "opt -sroa bad.ll -o
bad.bc".
$ opt -sroa bad.ll -o bad.bc
opt: llvm/lib/Transforms/Scalar/SROA.cpp:2063: llvm::Value*
convertValue(const llvm::DataLayout&, llvm::IRBuilder<>&,
llvm::Value*,
llvm::Type*): Assertion `canConvertValue(DL, V->getType(), Ty) &&
"Value
not convertable to type"' failed.
0 opt 0x08f44f52
1 opt 0x08f44bac
2 0xb7736400 __kernel_sigreturn + 0
3 0xb7736424 __kernel_vsyscall + 16
4 libc.so.6 0xb7482c8f gsignal + 79
5 libc.so.6 0xb74862b5 abort + 373
6 libc.so.6 0xb747b826 __assert_fail + 246
7 opt 0x08b109d7
8 opt 0x08b135ef
9 opt 0x08b13b15
10 opt 0x08b1fea4
11 opt 0x08b1d7e1
12 opt 0x08b1adbc
13 opt 0x08b11ec8
14 opt 0x08b18177
15 opt 0x08b182c5
16 opt 0x08b186fc
17 opt 0x08b19142
18 opt 0x08e62c4a llvm::FPPassManager::runOnFunction(llvm::Function&)
+ 306
19 opt 0x08e62dfe llvm::FPPassManager::runOnModule(llvm::Module&) +
114
20 opt 0x08e630cc llvm::MPPassManager::runOnModule(llvm::Module&) +
400
21 opt 0x08e635b6 llvm::PassManagerImpl::run(llvm::Module&) + 122
22 opt 0x08e63749 llvm::PassManager::run(llvm::Module&) + 39
23 opt 0x084556a5 main + 5635
24 libc.so.6 0xb746e113 __libc_start_main + 243
25 opt 0x08445bf1
Stack dump:
0. Program arguments: opt -sroa bad.ll -o bad.bc
1. Running pass 'Function Pass Manager' on module 'bad.ll'.
2. Running pass 'SROA' on function
'@_Z7vstore2Dv2_cjPU10AS16776960c'
Aborted
Is it a bug in SROA?
With the following patch, it seems the problem can be fixed. Any idea?
diff --git a/lib/Transforms/Scalar/SROA.cpp b/lib/Transforms/Scalar/SROA.cpp
index d95c855..696107a 100644
--- a/lib/Transforms/Scalar/SROA.cpp
+++ b/lib/Transforms/Scalar/SROA.cpp
@@ -2608,8 +2608,6 @@ private:
assert(OldOp == OldPtr);
IRBuilder<> IRB(&SI);
- if (VecTy)
- return rewriteVectorizedStoreInst(IRB, SI, OldOp);
Type *ValueTy = SI.getValueOperand()->getType();
uint64_t Size = EndOffset - BeginOffset;
@@ -2644,6 +2642,9 @@ private:
return IsConvertable;
}
+ if (VecTy)
+ return rewriteVectorizedStoreInst(IRB, SI, OldOp);
+
if (IntTy && ValueTy->isIntegerTy())
return rewriteIntegerStore(IRB, SI);
--
Thanks,
-Jiangning
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Hello,
I'm trying to use clang to compile a file on Mac OS (x86_64) and get the
following error.
<inline asm>:4:2: error: instruction requires a CPU feature not currently
enabled
jmp *%edx
^
fatal error: error in backend: Error parsing inline asm
This file does compile on an Ubuntu 32bit machine
I checked on google and didn't find anything helpful about it.
Does anyone know what CPU feature this instruction requires?
Thanks,
Alon
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Thanks for the report. I understand what is going on here and am working on it. I did a really bad job of fixing a previous bug, and this is further fallout from it. Please file this in bugzilla, with both this test case and the other test case you posted. They are the same fundamental bug and this way both will get fixed with a proper solution. On Wed, Nov 14, 2012 at 12:48 AM, Jiangning Liu <liujiangning1 at gmail.com> wrote:> Hi, > > For the following case, > > $ cat bad1.ll > target datalayout > "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" > > define internal void @test(i32 %v) { > entry: > %tmp = alloca i32, align 4 > store i32 %v, i32* %tmp, align 4 > %0 = bitcast i32* %tmp to <2 x i8>* > %1 = load <2 x i8>* %0, align 4 > ret void > } > > I have the following failure message for command line "opt -sroa bad.ll -o > bad.bc". > > $ opt -sroa bad.ll -o bad.bc > opt: llvm/lib/Transforms/Scalar/SROA.cpp:2063: llvm::Value* > convertValue(const llvm::DataLayout&, llvm::IRBuilder<>&, llvm::Value*, > llvm::Type*): Assertion `canConvertValue(DL, V->getType(), Ty) && "Value not > convertable to type"' failed. > 0 opt 0x08f44f52 > 1 opt 0x08f44bac > 2 0xb7736400 __kernel_sigreturn + 0 > 3 0xb7736424 __kernel_vsyscall + 16 > 4 libc.so.6 0xb7482c8f gsignal + 79 > 5 libc.so.6 0xb74862b5 abort + 373 > 6 libc.so.6 0xb747b826 __assert_fail + 246 > 7 opt 0x08b109d7 > 8 opt 0x08b135ef > 9 opt 0x08b13b15 > 10 opt 0x08b1fea4 > 11 opt 0x08b1d7e1 > 12 opt 0x08b1adbc > 13 opt 0x08b11ec8 > 14 opt 0x08b18177 > 15 opt 0x08b182c5 > 16 opt 0x08b186fc > 17 opt 0x08b19142 > 18 opt 0x08e62c4a llvm::FPPassManager::runOnFunction(llvm::Function&) > + 306 > 19 opt 0x08e62dfe llvm::FPPassManager::runOnModule(llvm::Module&) + > 114 > 20 opt 0x08e630cc llvm::MPPassManager::runOnModule(llvm::Module&) + > 400 > 21 opt 0x08e635b6 llvm::PassManagerImpl::run(llvm::Module&) + 122 > 22 opt 0x08e63749 llvm::PassManager::run(llvm::Module&) + 39 > 23 opt 0x084556a5 main + 5635 > 24 libc.so.6 0xb746e113 __libc_start_main + 243 > 25 opt 0x08445bf1 > Stack dump: > 0. Program arguments: opt -sroa bad.ll -o bad.bc > 1. Running pass 'Function Pass Manager' on module 'bad.ll'. > 2. Running pass 'SROA' on function '@_Z7vstore2Dv2_cjPU10AS16776960c' > Aborted > > Is it a bug in SROA? > > With the following patch, it seems the problem can be fixed. Any idea? > > diff --git a/lib/Transforms/Scalar/SROA.cpp b/lib/Transforms/Scalar/SROA.cpp > index d95c855..696107a 100644 > --- a/lib/Transforms/Scalar/SROA.cpp > +++ b/lib/Transforms/Scalar/SROA.cpp > @@ -2608,8 +2608,6 @@ private: > assert(OldOp == OldPtr); > IRBuilder<> IRB(&SI); > > - if (VecTy) > - return rewriteVectorizedStoreInst(IRB, SI, OldOp); > Type *ValueTy = SI.getValueOperand()->getType(); > > uint64_t Size = EndOffset - BeginOffset; > @@ -2644,6 +2642,9 @@ private: > return IsConvertable; > } > > + if (VecTy) > + return rewriteVectorizedStoreInst(IRB, SI, OldOp); > + > if (IntTy && ValueTy->isIntegerTy()) > return rewriteIntegerStore(IRB, SI); > > -- > Thanks, > -Jiangning > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >
Please file a bug at llvm.org/bugs/ Thanks! -eric On Wed, Nov 14, 2012 at 1:28 AM, Shaltiel, Alon <ashaltiel at nds.com> wrote:> Hello, > > I’m trying to use clang to compile a file on Mac OS (x86_64) and get the > following error. > > > > <inline asm>:4:2: error: instruction requires a CPU feature not currently > enabled > > jmp *%edx > > ^ > > fatal error: error in backend: Error parsing inline asm > > > > This file *does* compile on an Ubuntu 32bit machine > > > > I checked on google and didn’t find anything helpful about it. > > Does anyone know what CPU feature this instruction requires? > > > > Thanks, > > Alon > > ------------------------------ > > This message is confidential and intended only for the addressee. If you > have received this message in error, please immediately notify the > postmaster at nds.com and delete it from your system as well as any copies. > The content of e-mails as well as traffic data may be monitored by NDS for > employment and security purposes. > To protect the environment please do not print this e-mail unless > necessary. > > An NDS Group Limited company. www.nds.com > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121114/2380ff6e/attachment.html>
On Wed, Nov 14, 2012 at 1:28 AM, Shaltiel, Alon <ashaltiel at nds.com> wrote:> Hello, > > I’m trying to use clang to compile a file on Mac OS (x86_64) and get the > following error. > > > > <inline asm>:4:2: error: instruction requires a CPU feature not currently > enabled > > jmp *%edx > > ^ > > fatal error: error in backend: Error parsing inline asm > > > > This file does compile on an Ubuntu 32bit machine > > > > I checked on google and didn’t find anything helpful about it. > > Does anyone know what CPU feature this instruction requires?It requires that you're compiling in 32-bit mode. The 64-bit equivalent requires referencing a 64-bit register. (Also, please don't use "reply" in your mail client to send a message about an unrelated topic.) -Eli