llvm dev - Apr 2012 - [LLVMdev] Question::ARM simulation and cross compilation.

Hello,

I'm trying to evaluate the performance improvement of instruction scheduling
on one of the inorder ARM processor, I was looking for ARM simulator and I found
two (Simplescalar/ARM and SimIt-ARM)
The code generated using llvm-2.9 and llvm-gcc and gcc 3.2.
I used these command :

$ llvm-gcc -O3 -o test1.bc -c --emit-llvm test1.c
$ llc -O3 -o test1.s -march=arm test1.bc -mcpu=strongarm110
$ arm-linux-gcc test1.s  -mcpu=strongarm110 -static -O3 -o test1 
$ ./sim-uop test1

Unfortunately, got this message : 

bogus opcode detected @ 0x00008370 [sim_main:sim-uop.c, line 497]

My questions are :

Am I doing cross compiling right? Is there a way to cross compiler using
llvm-gcc?
Is there any modern open source ARM cycle accurate simulator that I can use with
llvm-gcc?

Thanks in advance.

Regards,
Najem. 		 	   		  
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20120412/7a9231de/attachment.html>

> I'm trying to evaluate the performance improvement of instruction
scheduling on one of the inorder ARM processor, I was looking for ARM simulator
and I found two (Simplescalar/ARM and SimIt-ARM)
> The code generated using llvm-2.9 and llvm-gcc and gcc 3.2.
> I used these command :
> 
> $ llvm-gcc -O3 -o test1.bc -c --emit-llvm test1.c
> $ llc -O3 -o test1.s -march=arm test1.bc -mcpu=strongarm110
> $ arm-linux-gcc test1.s  -mcpu=strongarm110 -static -O3 -o test1 
> $ ./sim-uop test1
  Looks good to me, but I would rather use LLVM/Clang 3.0. The flow is nearly
the same. You can use clang like this,

$ clang -ccc-host-triple armv7-none-linux-gnueabi -c hello.c -emit-llvm -o
hello.bc
> Unfortunately, got this message : 
> 
> bogus opcode detected @ 0x00008370 [sim_main:sim-uop.c, line 497]
Have you try to run the binary on a ARM machine or emulator like QEMU to see if
the binary work or not?
 
Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

The SA110 StrongARM is a very old ARMv4 chip.   I don't know the state of
codegen for ARMv4 (I remember reading that anything below v6 was still not
perfect, although v5 works very nicely here), but there's a chance an
instruction is being generated that isn't fully ARMv4 compatible...  and the
ancient GCC might not recognize this properly.    SimIt-ARM seems to support
ARMv5, so you might try that instead.

There are at least a couple of things wrong with the invocation when using it
for this:

1)      You should also be telling llvm-gcc that it's targeting ARM code,
and make sure it is pointing at your cross GCC's include directories.   From
the command below, llvm-gcc is probably pulling in your system's headers
from /usr/include and may contain incorrect function prototypes and data sizes
which could propagate into the final code.  I think -nostdinc should be enough
since you're not using llvm-gcc to drive the linker.  Then you can do
-isystem and point it at the root "usr" dir of your crosstools or
manual -I/path/to/crosstools_for/arm-linux/include ... etc to get the correct
ones.

2)      You should be passing -arch armv4 into llvm-gcc as well (at the very
minimum) so it generates correct data layout settings in the bitcode, and feed
LLC the entire triple to be safe.   ( -mtriple=arm-linux-gnueabi ).  This
depends on whether or not you built llvm-gcc targeted to arm-linux or not,
though.

To answer your other question,  there is an llvm-based project called SkyEye
(http://sourceforge.net/apps/phpwebsite/skyeye/) but I don't know how far
along it is or whether it will do what you're looking for.

Cheers,
Gordon Keiser
Software Development Engineer
Arxan Technologies, Inc.
1305 Cumberland Ave, Ste 215
West Lafayette, IN



From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of NaJeM ErMeLeH
Sent: Thursday, April 12, 2012 11:13 AM
To: LLVM-Forum
Subject: [LLVMdev] Question::ARM simulation and cross compilation.

Hello,

I'm trying to evaluate the performance improvement of instruction scheduling
on one of the inorder ARM processor, I was looking for ARM simulator and I found
two (Simplescalar/ARM and SimIt-ARM)
The code generated using llvm-2.9 and llvm-gcc and gcc 3.2.
I used these command :

$ llvm-gcc -O3 -o test1.bc -c --emit-llvm test1.c
$ llc -O3 -o test1.s -march=arm test1.bc -mcpu=strongarm110
$ arm-linux-gcc test1.s  -mcpu=strongarm110 -static -O3 -o test1
$ ./sim-uop test1

Unfortunately, got this message :

bogus opcode detected @ 0x00008370 [sim_main:sim-uop.c, line 497]

My questions are :

Am I doing cross compiling right? Is there a way to cross compiler using
llvm-gcc?
Is there any modern open source ARM cycle accurate simulator that I can use with
llvm-gcc?

Thanks in advance.

Regards,
Najem.
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20120413/11dd476b/attachment.html>