similar to: [LLVMdev] Question::ARM simulation and cross compilation.

Hello LLVM developers, I'm assisting my doctor who is doing a research and he wants to use the llvm compiler, my job is to profile build the benchmarks using llvm-prof. What i want to know is the following 1- does llvm support profile feedback optimizations!? 2- when i've used the llvm-prof it's input is an object file (not binary as other compilers) my question is how could I

Dear Najem, You might want to read the llvm-prof documentation if you haven't already: http://llvm.org/cmds/llvm-prof.html. The documentation mentions a script in the utils directory that automates some of the profiling tasks for you. I suspect the way that llvm-prof works is to compile your whole program to a single LLVM bitcode file, run a transform on it, and then generate native

Hi Najem, On Mar 21, 2011, at 9:47 AM, NaJeM ErMeLeH wrote: > I'm assisting my doctor who is doing a research and he wants to use the llvm compiler, my job is to profile build the benchmarks using llvm-prof. > > What i want to know is the following > > 1- does llvm support profile feedback optimizations!? Not yet. Please see Bob's proposal:

> On May 9, 2020, at 5:12 PM, Andrea Di Biagio via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > The llvm scheduling model is quite simple and doesn't allow mca to accurately simulate the execution of individual uOPs. That limitation is sort-of acceptable if you consider how the scheduling model framework was originally designed with a different goal in mind (i.e. machine

Hi, I am using samba-2.2.8a.tar.gz source and complied for regular linux. Now I am trying to cross compile it, but do not have any guidelines on how to do it? Anyone can help me on, making cross compilation work for arm-linux host. Any help is appreciated. Regards Pritesh "As a well spent day brings happy sleep, so life well used brings happy death." - Leonardo da Vinci TATA

(SuSE Pro 9.3, Samba 3.0.13-1.1) (I posted this earlier but didn't get much response so I'm trying again with a different subject line.) I have a Samba server set up on a Linux machine. I have four shares set up, not counting all those system things (homes, profiles, etc). When I access the shares from a Windows machine, the four shares show up like they're supposed to, in

Hi Alex, On Sun, May 10, 2020 at 4:00 PM Alex Renda <renda at csail.mit.edu> wrote: > Thanks, that’s very helpful! > > > > Also, sorry for the miscue on that bug with the 2/4 cycles — I realize now > that that’s an artifact of a change that I made to not crash when resource > groups overlap without all atomic subunits being specified: > > `echo 'fxrstor

Hello, I'm trying to evaluate the different register allocation algorithms on LLVM using the same level of optimizations. Using version 3.3 the current register allocators available to use are "basic, fast, greedy and pbqp". However, I'm facing the following issues: 1) I can't run basic and PBQP allocators using the command line flags of the dragonegg

Hello, I read in the announcement of the UOP that Open Ldap will be deprecated after Version 5 an replaced by the Directory Server. Is the Directory Server included in CentOS 5 or only included in the Version 5 orf the UOP? Cheers Sebastian

Ooops, we did it again ... This release (4.7) has the first release notes on the wiki for a CentOS 4 release. And as always we could use some people to translate those :) We didn't find that many problems within QA, so the release notes should now be fairly complete, with limitied changes to them. ISo if you are interested and willing (you are, aren't you?), this is the place to edit:

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

Hi, I’m trying to work out the behavior of llvm-mca on instructions with ProcResGroups. My current understanding is: When an instruction requests a port group (e.g., HWPort015) and all of its atomic sub-resources (e.g., HWPort0,HWPort1,HWPort5), HWPort015 is marked as “reserved” and is issued in parallel with HWPort0, HWPort1, and HWPort5, blocking future instructions from reserving HWPort015

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

[You can find an easier to read and more complete version of this RFC here <https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?ts=5aaa84ee#> .] Knowing instruction scheduling properties (latency, uops) is the basis for all scheduling work done by LLVM. Unfortunately, vendors usually release only partial (and sometimes incorrect) information. Updating the

Hi Jim, On Tue, Sep 25, 2012 at 10:52:58AM -0700, Jim Grosbach wrote: > These errors are from the assembler, not LLVM. Specifically, your binutils is > too old. Given that it doesn't even recognize the ".syntax" directive, they're > *very* much too old. You need to upgrade. > -Jim She said in her previous mail, P.S. Because I got error when I use

I had that happen to me on w2k. Your spooler service is stopped. I had an invalid print driver entry in Samba and when I printed to any of the printers on my Samba server it would cause the service to stop. To fix it I replaced the printer tdb's and re-installed the drivers. Josh -----Original Message----- From: Klopf, Tom [mailto:Tom.Klopf@mms.gov] Sent: Wednesday, June 12, 2002

Hello, I'm trying to cross compile the MiBench benchmarks using LLC and ARM cross compiler the binaries generated will be used on pandaboard or the qemu-arm emulator. I have faced multiple issues during the compilation process, here are the commands used. # generate LLVM-IR for dijkstra_large.c $gcc -S -flto -o dijkstra_large.bc -fplugin=${DRAGONEGG} dijkstra_large.c # generate TARGET

Hello, I want to compile MiBench by clang, and the target-ISA is armv4. The code generated using llvm-2.9, clang-2.9, and arm-linux-gcc (gcc version 2.95.2), simulator is sim-panalyzer 2.0.3 . I use these commends: $ clang -O3 -o hello.ll -c -emit-llvm hello.c $ llc -O3 -o hello.s -march=arm -mcpu=strongarm1100 hello.ll $ arm-linux-gcc -O3 -march=armv4 -mcpu=strongarm1100 -static

On 03/15/2018 10:04 AM, Guillaume Chatelet via llvm-dev wrote: > [You can find an easier to read and more complete version of this RFC > here > <https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?ts=5aaa84ee#>.] > > Knowing instruction scheduling properties (latency, uops) is the basis > for all scheduling work done by LLVM. > > >

On Thu, Mar 15, 2018 at 4:41 PM, Hal Finkel via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > On 03/15/2018 10:04 AM, Guillaume Chatelet via llvm-dev wrote: > > [You can find an easier to read and more complete version of this RFC here > <https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?ts=5aaa84ee#> > .] > > Knowing