llvm dev - Nov 2011 - [LLVMdev] Subregister definition / use

Hi,

I can't find a way to define a subregister in a MI, while using another
subregister in the same MI.

For example:

reg:low  = OP reg:hi, rhs

I really need the reg:low to be part of the same register as reg:hi, but when I
use REG_SEQUENCE, this does not happen - I instead get
regC = OP reg:hi, rhs
reg:low = regC

This is not good enough for me. What should I do?

/Jonas
 		 	   		  
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On Nov 9, 2011, at 7:48 AM, Jonas Paulsson wrote:
> Hi,
> 
> I can't find a way to define a subregister in a MI, while using another
subregister in the same MI.
> 
> For example:
> 
> reg:low  = OP reg:hi, rhs
> 
> I really need the reg:low to be part of the same register as reg:hi
LLVM doesn't support this kind of constraint in its default register
allocators.

You may be able to get the PBQP allocator to enforce the constraint.

Alternatively, model your instruction as reading and writing the full register
with a normal two-addr constraint.

/jakob

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