Hi Jack,
Here is a short update regarding the vector_select development.
Adding vector-select has two main tasks: (a) type-legalization changes, and (b)
vector-select (blend instruction) support.
The type-legalization change is adding a new kind of type-legalization: the
promotion of integer vector elements into wider element types. I had committed
the code for this change. It is currently only enabled by a command line flag
(-promote-elements). I am now working on fixing bugs in the new code and in
different places in LLVM in order to enable this feature by default. In order to
enable this test by default I want all of the tests in the test-suite to pass.
At the moment only ~14 LIT tests are failing when enabling the new
type-legalization mode. I expect to finish this work in a few weeks.
Notice that once this work is complete you should expect to see much better code
generation on 'illegal' vector types such as <4 x i8>. See PR
9623.
Once the type-legalization part is complete, adding the vector-select (blend
instruction) code will be easy. It is included in the patch that I sent to the
commit-list a few weeks ago.
So, bottom line, we are getting there :)
-Nadav
-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
Behalf Of Jack Howarth
Sent: Monday, June 27, 2011 02:16
To: llvmdev at cs.uiuc.edu
Subject: [LLVMdev] dragonegg pb05 for gcc 4.5.4 vs 4.6.1
With current dragonegg svn, the Polyhedron 2005 benchmarks
all now pass when using the compiler plugin under FSF gcc 4.6.1
on x86_64-apple-darwin11. The differences between the runtime
and compile times when using the same plugin under FSF gcc 4.5.4svn
are small. Once new vector_select feature is available in llvm and
-fplugin-arg-dragonegg-enable-gcc-optzns supports -ftree-vectorizer
we might see more of a difference between the two FSF gcc releases.
-ffast-math -funroll-loops -msse3 -O3
Runtime
Benchmark gcc 4.5.4 gcc 4.6.1
ac 12.19 10.99
aermod 17.84 17.52
air 7.83 7.66
capacita 46.11 45.84
channel 1.96 1.96
doduc 30.17 30.43
fatigue 8.96 9.12
gas_dyn 11.75 11.50
induct 24.52 24.46
linkpk 15.73 15.64
mbdx 12.10 12.01
nf 29.08 29.27
protein 40.44 41.04
rnflow 31.89 31.90
test_fpu 11.34 11.33
tfft 2.19 2.19
mean time 13.98 13.85
Compile time
Benchmark gcc 4.5.4 gcc 4.6.1
ac 0.79 0.30
aermod 20.87 21.92
air 0.81 0.86
capacita 0.43 0.53
channel 0.25 0.25
doduc 1.66 1.79
fatigue 0.83 0.87
gas_dyn 0.77 0.74
induct 1.65 1.87
linkpk 0.20 0.21
mbdx 0.60 0.64
nf 0.27 0.32
protein 0.97 1.07
rnflow 1.24 1.38
test_fpu 1.03 1.04
tfft 0.19 0.20
_______________________________________________
LLVM Developers mailing list
LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
---------------------------------------------------------------------
Intel Israel (74) Limited
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.