Hi, all It seems PPC JIT does not recognize inline assembly. For example, when I give LLVM IR belows to PPC JIT, %0 = tail call i32* asm "", "={r10}"() nounwind ; <i32*> [#uses=1] it complaints that inline assembly is not a supported instruction. x86 JIT works fine, however. Is there a reason that makes PPC JIT not support inline assembly? Currently, we modify PPCGenCodeEmitter.inc, then rebuild LLVM to let ppc recognize inline assembly (see attachment). Is there a better way to make PPC JIT support inline assembly? Any suggestion appreciated. Regards, chenwj -- Wei-Ren Chen (陳韋任) Parallel Processing Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667 -------------- next part -------------- A non-text attachment was scrubbed... Name: PPCGenCodeEmitter.inc.patch Type: text/x-diff Size: 348 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110324/77b505e8/attachment.patch>
Hi 陳韋任,> It seems PPC JIT does not recognize inline assembly. > For example, when I give LLVM IR belows to PPC JIT, > > %0 = tail call i32* asm "", "={r10}"() nounwind ;<i32*> [#uses=1] > > it complaints that inline assembly is not a supported > instruction. x86 JIT works fine, however.I'm surprised this worked with the x86 JIT - I thought the JIT didn't support any inline assembler on any platform, and that the plan was to solve this with the new MC-JIT, see http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.html Ciao, Duncan.
Hi, Very few inline assembly are supported for the X86 backend. As I see from X86ISelLowering.cpp, only bswap, rorw, xchgl and simple register selections (e.g. {=r10}) LLVM JIT can recoginze. But for PPC backend, I am not sure why PPC JIT see all inline assembly IRs as an error. Ding-Yong On Thu, Mar 24, 2011 at 2:53 PM, Duncan Sands <baldrick at free.fr> wrote:> Hi 陳韋任, > > > It seems PPC JIT does not recognize inline assembly. > > For example, when I give LLVM IR belows to PPC JIT, > > > > %0 = tail call i32* asm "", "={r10}"() nounwind ;<i32*> [#uses=1] > > > > it complaints that inline assembly is not a supported > > instruction. x86 JIT works fine, however. > > I'm surprised this worked with the x86 JIT - I thought the JIT didn't > support any inline assembler on any platform, and that the plan was to > solve this with the new MC-JIT, see > http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.html > > Ciao, Duncan. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110324/0c7ab201/attachment.html>
Hi, Duncan> support any inline assembler on any platform, and that the plan was to > solve this with the new MC-JIT, see > http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.htmlAt the first glance, I think what llvm-mc does is, given an input, llvm-mc will disassemble the input into assembly. I don't know the MC-JIT you mentioned can be used as a JIT. Currently, a JIT is created by ExecutionEngine::createJIT. Can you give more information about the MC-JIT? Is it already included in llvm-2.8? Thank! Regards, chenwj -- Wei-Ren Chen (陳韋任) Parallel Processing Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667