Ken Dyck
2010-Jun-08 18:09 UTC
[LLVMdev] (implicit <reg>) vs. Defs = [<reg>] in InstrInfo.td
When describing implicit register definitions for instructions in the InstrInfo.td file of a back end, what is the difference between using an 'implicit' node in the Pattern versus initializing the 'Defs' field? One difference seems to be that an 'implicit' node only comes into effect when the instruction is matched through the instruction's Pattern field. If the instruction is used in an external pattern, the 'implicit' node is ignored. Is that right? -Ken
Apparently Analagous Threads
- [LLVMdev] implicit CC register Defs cause "physreg was not killed in defining block!" assert
- [LLVMdev] implicit CC register Defs cause "physreg was not killed in defining block!" assert
- [LLVMdev] ScheduleDAGInstrs/R600 test potential issue with implicit defs
- RegAlloc Q: spill when implicit-def physreg is also the output reg of instruction
- RegAlloc Q: spill when implicit-def physreg is also the output reg of instruction
Wisdom of the Ancients
