> llvm-gcc HelloWorld.c > /home/LLVM/install/lib/gcc/arm-elf/4.2.1/../../../../arm-elf/bin/ld: this linker was not configured to use sysroots > collect2: ld returned 1 exit status > > I would appreciate some help from you.You have to pass --with-sysroot when building binutils too.> CorinaCheers, -- Rafael Ávila de Espíndola
>> llvm-gcc HelloWorld.c >> /home/LLVM/install/lib/gcc/arm-elf/4.2.1/../../../../arm-elf/bin/ld: this linker was not configured to use sysroots >> collect2: ld returned 1 exit status >> >> I would appreciate some help from you. > > You have to pass --with-sysroot when building binutils too.It might be easier just to build newlib during the build of llvm-gcc. Also, I don't think libc is usable /exists for bare-metal target (arm-elf/arm-eabi). -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
hi all I read LLVM manual, and have a question in the LLVM IR. The IR is low-level SSA based instruction set. I want to know what the difference between the LLVM IR and SSA form? They are same, similar to tree-ssa of GCC convertion GIMPLE tree to SSA and convert back when optimizations finish? or just attach the SSA info in the LLVM IR? Thanks for your feedback. -Joey -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100118/4c82a3a3/attachment.html>
Hi Joey,> I read LLVM manual, and have a question in the LLVM IR. > The IR is low-level SSA based instruction set. > > I want to know what the difference between the LLVM IR and SSA form? > They are same, similar to tree-ssa of GCC convertion GIMPLE tree to SSA > and convert back when optimizations finish? > or just attach the SSA info in the LLVM IR?LLVM IR is always in SSA form - there is no conversion between a non-SSA version and an SSA-version, there is only the SSA version. Consider an LLVM load instruction: %tmp = load i32* %addr Here %addr is the pointer being loaded from, and %tmp is the loaded value. Since LLVM IR is in SSA form, %tmp cannot be defined differently later, so %tmp is *equivalent* to the instruction "load i32* %addr". Thus (unlike in GIMPLE) there is no actual assignment going on in "%tmp = ...", this textual form is just for the benefit of human readers, and means that %tmp is the name of the instruction on the right-hand side. This is why you will search in vain for an assignment instruction in the IR definition: there isn't one. In order to get the effect of assigning multiple times to a variable, you either need to generate explicit phi nodes, or generate explicit stores to memory (unlike registers like %tmp, memory is not in SSA form; this is the same as in GIMPLE). Ciao, Duncan.