On Mon, Apr 14, 2008 at 5:02 PM, Bill Wendling <isanbard at gmail.com> wrote:> Then that flow would be explicit in the CFG, right? Then %F wouldn't > be dead, I'm assuming.Right. That's why I used a conditional branch after the intrinsic, but it sounds like the CFG simplification pass after lowering will optimize it away and no longer have the flow explicit. (To the rest of the compiler, the only flow into %F is from the branch, but actual execution can have flow enter %F from elsewhere with the *same* flow behavior as if it entered from the branch.) On Mon, Apr 14, 2008 at 6:00 PM, Chris Lattner <sabre at nondot.org> wrote:> You can change the code generator or not run the block layout pass.Ok thanks for the help. I'll try finding where to twiddle this. Perhaps explicitly check if the branch's condition is the call to my intrinsic. Or is there another way for me to have my intrinsic return a Value that causes the codegen to emit an unconditional jump yet keep the CFG intact? Ed
On Mon, 14 Apr 2008, Edward Lee wrote:> On Mon, Apr 14, 2008 at 6:00 PM, Chris Lattner <sabre at nondot.org> wrote: >> You can change the code generator or not run the block layout pass. > Ok thanks for the help. I'll try finding where to twiddle this. > Perhaps explicitly check if the branch's condition is the call to my > intrinsic. > > Or is there another way for me to have my intrinsic return a Value > that causes the codegen to emit an unconditional jump yet keep the CFG > intact?No. -Chris -- http://nondot.org/sabre/ http://llvm.org/
On Mon, Apr 14, 2008 at 8:17 PM, Chris Lattner <sabre at nondot.org> wrote:> On Mon, 14 Apr 2008, Edward Lee wrote: > > Or is there another way for me to have my intrinsic return a Value > > that causes the codegen to emit an unconditional jump yet keep the CFG > > intact? > No.After thinking about it a bit more, if I choose not to Lower the intrinsic, I can emit x86 code by changing Target/X86/...td. If I'm understanding the codebase correctly, LLVM will basically treat the intrinsic as a black box and emit whatever I tell it to emit. So for "my_intrinsic : Intrinsic<llvm_i1_ty>", I can "X86Inst<bits I want in binary>". Where bits is actually 2 x86 instructions: The special opcode sequence I want followed by a load immediate of 1 into the output register. I suppose the other possibility based on Chris' suggestion is to Lower the intrinsic and specially handle the block layout to not kill the edge. I would then lower the intrinsic into an inline asm call for the special opcode followed by an a ConstantInt 1. (Could I get a pointer to a file/method to modify for block layout/CFG optimization?) Ed