llvm dev - Jul 2007 - [LLVMdev] Proposal for atomic and synchronization instructions

On 7/9/07, Andrew Lenharth <andrewl at lenharth.org>
wrote:
> Poor alpha, no code examples or entries in your tables.
But that said, it uses a load-locked, store-conditional and has
various memory barriers which are sufficient to implement all your
proposal.

Andrew
> On 7/9/07, Chandler Carruth <chandlerc at gmail.com> wrote:
> > Hello,
> >
> > After a fair amount of research and work, I have put together a
> > concrete proposal for LLVM representations of atomic operations and
> > synchronization constructs. These aim to provide the minimal
> > functionality in the IR for representing the hardware constructs that
> > threading libraries and parallel programming rely on.
> >
> > http://chandlerc.net/llvm_atomics.html
> >
> > While I am no expert on the various architectures, I've done my
best
> > at providing base-line implementations for each instruction. I am sure
> > these will need tweaking and fixing, but should provide a very good
> > starting point for the targets.
> >
> > Comments are more than welcome, especially suggestions for
> > improvement. I hope this provides a sound background and a good
> > starting place for bringing these features to LLVM. Many thanks also
> > go to Reid who has helped tremendously with putting this together, and
> > several of the people at Aerospace who helped in the research phase.
> >
> > -Chandler Carruth
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >
>

That is good to hear. The lack of Alpha was purely a lack of
time/knowledge of the architecture on my part, hopefully I can start
learning some more about how it functions. If you send me either a
pointer to appropriate documentation I would be happy to add
appropriate information to the page. If you can provide
implementations, it would save time, but I don't mind doing a fair
portion of the grunt work.

-Chandler Carruth

On 7/9/07, Andrew Lenharth <andrewl at lenharth.org>
wrote:
> On 7/9/07, Andrew Lenharth <andrewl at lenharth.org> wrote:
> > Poor alpha, no code examples or entries in your tables.
>
> But that said, it uses a load-locked, store-conditional and has
> various memory barriers which are sufficient to implement all your
> proposal.
>
> Andrew
>
> > On 7/9/07, Chandler Carruth <chandlerc at gmail.com> wrote:
> > > Hello,
> > >
> > > After a fair amount of research and work, I have put together a
> > > concrete proposal for LLVM representations of atomic operations
and
> > > synchronization constructs. These aim to provide the minimal
> > > functionality in the IR for representing the hardware constructs
that
> > > threading libraries and parallel programming rely on.
> > >
> > > http://chandlerc.net/llvm_atomics.html
> > >
> > > While I am no expert on the various architectures, I've done
my best
> > > at providing base-line implementations for each instruction. I am
sure
> > > these will need tweaking and fixing, but should provide a very
good
> > > starting point for the targets.
> > >
> > > Comments are more than welcome, especially suggestions for
> > > improvement. I hope this provides a sound background and a good
> > > starting place for bringing these features to LLVM. Many thanks
also
> > > go to Reid who has helped tremendously with putting this
together, and
> > > several of the people at Aerospace who helped in the research
phase.
> > >
> > > -Chandler Carruth
> > > _______________________________________________
> > > LLVM Developers mailing list
> > > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> > >
> >
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>

On Monday 09 July 2007 22:14, Chandler Carruth wrote:
> That is good to hear. The lack of Alpha was purely a lack of
> time/knowledge of the architecture on my part, hopefully I can start
> learning some more about how it functions. If you send me either a
> pointer to appropriate documentation I would be happy to add
> appropriate information to the page. If you can provide
> implementations, it would save time, but I don't mind doing a fair
> portion of the grunt work.
atomic_ops has at least a basic implementation for alpha (and various other 
architectures).

torvald