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Jan Kiszka

2018-Mar-04 18:31 UTC

[PATCH v4 0/7] jailhouse: Enhance secondary Jailhouse guest support /wrt PCI

Basic x86 support [1] for running Linux as secondary Jailhouse [2] guest
is currently pending in the tip tree. This builds on top and enhances
the PCI support for x86 and also ARM guests (ARM[64] does not require
platform patches and works already).

Key elements of this series are:
 - detection of Jailhouse via device tree hypervisor node
 - function-level PCI scan if Jailhouse is detected
 - MMCONFIG support for x86 guests

As most changes affect x86, I would suggest to route the series also via
tip after the necessary acks are collected.

Changes in v4:
 - slit up Kconfig changes
 - respect pcibios_last_bus during mmconfig setup
 - cosmetic changes requested by Andy

Changes in v3:
 - avoided duplicate scans of PCI functions under Jailhouse
 - reformated PCI_MMCONFIG condition and rephrase related commit log

Changes in v2:
 - adjusted commit log and include ordering in patch 2
 - rebased over Linus master

Jan

[1] https://lkml.org/lkml/2017/11/27/125
[2] http://jailhouse-project.org

CC: Benedikt Spranger <b.spranger at linutronix.de>
CC: Juergen Gross <jgross at suse.com>
CC: Mark Rutland <mark.rutland at arm.com>
CC: Otavio Pontes <otavio.pontes at intel.com>
CC: Rob Herring <robh+dt at kernel.org>

Jan Kiszka (6):
  jailhouse: Provide detection for non-x86 systems
  PCI: Scan all functions when running over Jailhouse
  x86: Align x86_64 PCI_MMCONFIG with 32-bit variant
  x86: Consolidate PCI_MMCONFIG configs
  x86/jailhouse: Allow to use PCI_MMCONFIG without ACPI
  MAINTAINERS: Add entry for Jailhouse

Otavio Pontes (1):
  x86/jailhouse: Enable PCI mmconfig access in inmates

 Documentation/devicetree/bindings/jailhouse.txt |  8 ++++++++
 MAINTAINERS                                     |  7 +++++++
 arch/x86/Kconfig                                | 12 +++++++-----
 arch/x86/include/asm/jailhouse_para.h           |  2 +-
 arch/x86/include/asm/pci_x86.h                  |  2 ++
 arch/x86/kernel/Makefile                        |  2 +-
 arch/x86/kernel/cpu/amd.c                       |  2 +-
 arch/x86/kernel/jailhouse.c                     |  8 ++++++++
 arch/x86/pci/legacy.c                           |  4 +++-
 arch/x86/pci/mmconfig-shared.c                  |  4 ++--
 drivers/pci/probe.c                             | 22 +++++++++++++++++++---
 include/linux/hypervisor.h                      | 17 +++++++++++++++--
 12 files changed, 74 insertions(+), 16 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/jailhouse.txt

-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 1/7] jailhouse: Provide detection for non-x86 systems

From: Jan Kiszka <jan.kiszka at siemens.com>

Implement jailhouse_paravirt() via device tree probing on architectures
!= x86. Will be used by the PCI core.

CC: Rob Herring <robh+dt at kernel.org>
CC: Mark Rutland <mark.rutland at arm.com>
CC: Juergen Gross <jgross at suse.com>
Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
Reviewed-by: Juergen Gross <jgross at suse.com>
---
 Documentation/devicetree/bindings/jailhouse.txt |  8 ++++++++
 arch/x86/include/asm/jailhouse_para.h           |  2 +-
 include/linux/hypervisor.h                      | 17 +++++++++++++++--
 3 files changed, 24 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/jailhouse.txt

diff --git a/Documentation/devicetree/bindings/jailhouse.txt
b/Documentation/devicetree/bindings/jailhouse.txt
new file mode 100644
index 000000000000..2901c25ff340
--- /dev/null
+++ b/Documentation/devicetree/bindings/jailhouse.txt
@@ -0,0 +1,8 @@
+Jailhouse non-root cell device tree bindings
+--------------------------------------------
+
+When running in a non-root Jailhouse cell (partition), the device tree of this
+platform shall have a top-level "hypervisor" node with the following
+properties:
+
+- compatible = "jailhouse,cell"
diff --git a/arch/x86/include/asm/jailhouse_para.h
b/arch/x86/include/asm/jailhouse_para.h
index 875b54376689..b885a961a150 100644
--- a/arch/x86/include/asm/jailhouse_para.h
+++ b/arch/x86/include/asm/jailhouse_para.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL2.0 */
 
 /*
- * Jailhouse paravirt_ops implementation
+ * Jailhouse paravirt detection
  *
  * Copyright (c) Siemens AG, 2015-2017
  *
diff --git a/include/linux/hypervisor.h b/include/linux/hypervisor.h
index b19563f9a8eb..fc08b433c856 100644
--- a/include/linux/hypervisor.h
+++ b/include/linux/hypervisor.h
@@ -8,15 +8,28 @@
  */
 
 #ifdef CONFIG_X86
+
+#include <asm/jailhouse_para.h>
 #include <asm/x86_init.h>
+
 static inline void hypervisor_pin_vcpu(int cpu)
 {
 	x86_platform.hyper.pin_vcpu(cpu);
 }
-#else
+
+#else /* !CONFIG_X86 */
+
+#include <linux/of.h>
+
 static inline void hypervisor_pin_vcpu(int cpu)
 {
 }
-#endif
+
+static inline bool jailhouse_paravirt(void)
+{
+	return of_find_compatible_node(NULL, NULL, "jailhouse,cell");
+}
+
+#endif /* !CONFIG_X86 */
 
 #endif /* __LINUX_HYPEVISOR_H */
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 2/7] PCI: Scan all functions when running over Jailhouse

From: Jan Kiszka <jan.kiszka at siemens.com>

Per PCIe r4.0, sec 7.5.1.1.9, multi-function devices are required to
have a function 0.  Therefore, Linux scans for devices at function 0
(devfn 0/8/16/...) and only scans for other functions if function 0
has its Multi-Function Device bit set or ARI or SR-IOV indicate
there are more functions.

The Jailhouse hypervisor may pass individual functions of a
multi-function device to a guest without passing function 0, which
means a Linux guest won't find them.

Change Linux PCI probing so it scans all function numbers when
running as a guest over Jailhouse.

This is technically prohibited by the spec, so it is possible that
PCI devices without the Multi-Function Device bit set may have
unexpected behavior in response to this probe.

Derived from original patch by Benedikt Spranger.

CC: Benedikt Spranger <b.spranger at linutronix.de>
Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
Acked-by: Bjorn Helgaas <bhelgaas at google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko at gmail.com>
---
 arch/x86/pci/legacy.c |  4 +++-
 drivers/pci/probe.c   | 22 +++++++++++++++++++---
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 1cb01abcb1be..dfbe6ac38830 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -4,6 +4,7 @@
 #include <linux/init.h>
 #include <linux/export.h>
 #include <linux/pci.h>
+#include <asm/jailhouse_para.h>
 #include <asm/pci_x86.h>
 
 /*
@@ -34,13 +35,14 @@ int __init pci_legacy_init(void)
 
 void pcibios_scan_specific_bus(int busn)
 {
+	int stride = jailhouse_paravirt() ? 1 : 8;
 	int devfn;
 	u32 l;
 
 	if (pci_find_bus(0, busn))
 		return;
 
-	for (devfn = 0; devfn < 256; devfn += 8) {
+	for (devfn = 0; devfn < 256; devfn += stride) {
 		if (!raw_pci_read(0, busn, devfn, PCI_VENDOR_ID, 2, &l) &&
 		    l != 0x0000 && l != 0xffff) {
 			DBG("Found device at %02x:%02x [%04x]\n", busn, devfn, l);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index ef5377438a1e..3c365dc996e7 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -16,6 +16,7 @@
 #include <linux/pci-aspm.h>
 #include <linux/aer.h>
 #include <linux/acpi.h>
+#include <linux/hypervisor.h>
 #include <linux/irqdomain.h>
 #include <linux/pm_runtime.h>
 #include "pci.h"
@@ -2518,14 +2519,29 @@ static unsigned int pci_scan_child_bus_extend(struct
pci_bus *bus,
 {
 	unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0;
 	unsigned int start = bus->busn_res.start;
-	unsigned int devfn, cmax, max = start;
+	unsigned int devfn, fn, cmax, max = start;
 	struct pci_dev *dev;
+	int nr_devs;
 
 	dev_dbg(&bus->dev, "scanning bus\n");
 
 	/* Go find them, Rover! */
-	for (devfn = 0; devfn < 0x100; devfn += 8)
-		pci_scan_slot(bus, devfn);
+	for (devfn = 0; devfn < 256; devfn += 8) {
+		nr_devs = pci_scan_slot(bus, devfn);
+
+		/*
+		 * The Jailhouse hypervisor may pass individual functions of a
+		 * multi-function device to a guest without passing function 0.
+		 * Look for them as well.
+		 */
+		if (jailhouse_paravirt() && nr_devs == 0) {
+			for (fn = 1; fn < 8; fn++) {
+				dev = pci_scan_single_device(bus, devfn + fn);
+				if (dev)
+					dev->multifunction = 1;
+			}
+		}
+	}
 
 	/* Reserve buses for SR-IOV capability */
 	used_buses = pci_iov_bus_range(bus);
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 3/7] x86/jailhouse: Enable PCI mmconfig access in inmates

From: Otavio Pontes <otavio.pontes at intel.com>

Use the PCI mmconfig base address exported by jailhouse in boot
parameters in order to access the memory mapped PCI configuration space.

Signed-off-by: Otavio Pontes <otavio.pontes at intel.com>
[Jan: rebased, fixed !CONFIG_PCI_MMCONFIG, used pcibios_last_bus]
Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
 arch/x86/include/asm/pci_x86.h | 2 ++
 arch/x86/kernel/jailhouse.c    | 8 ++++++++
 arch/x86/pci/mmconfig-shared.c | 4 ++--
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index eb66fa9cd0fc..959d618dbb17 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -151,6 +151,8 @@ extern int pci_mmconfig_insert(struct device *dev, u16 seg,
u8 start, u8 end,
 			       phys_addr_t addr);
 extern int pci_mmconfig_delete(u16 seg, u8 start, u8 end);
 extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus);
+extern struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
+							int end, u64 addr);
 
 extern struct list_head pci_mmcfg_list;
 
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index b68fd895235a..fa183a131edc 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -124,6 +124,14 @@ static int __init jailhouse_pci_arch_init(void)
 	if (pcibios_last_bus < 0)
 		pcibios_last_bus = 0xff;
 
+#ifdef CONFIG_PCI_MMCONFIG
+	if (setup_data.pci_mmconfig_base) {
+		pci_mmconfig_add(0, 0, pcibios_last_bus,
+				 setup_data.pci_mmconfig_base);
+		pci_mmcfg_arch_init();
+	}
+#endif
+
 	return 0;
 }
 
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 96684d0adcf9..0e590272366b 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -94,8 +94,8 @@ static struct pci_mmcfg_region *pci_mmconfig_alloc(int
segment, int start,
 	return new;
 }
 
-static struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
-							int end, u64 addr)
+struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
+						 int end, u64 addr)
 {
 	struct pci_mmcfg_region *new;
 
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 4/7] x86: Align x86_64 PCI_MMCONFIG with 32-bit variant

From: Jan Kiszka <jan.kiszka at siemens.com>

Allow to enable PCI_MMCONFIG when only SFI is present and make this
option default on. This will help consolidating both into one Kconfig
statement.

Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
 arch/x86/Kconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index eb7f43f23521..c19f5342ec2b 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2659,7 +2659,8 @@ config PCI_DOMAINS
 
 config PCI_MMCONFIG
 	bool "Support mmconfig PCI config space access"
-	depends on X86_64 && PCI && ACPI
+	default y
+	depends on X86_64 && PCI && (ACPI || SFI)
 
 config PCI_CNB20LE_QUIRK
 	bool "Read CNB20LE Host Bridge Windows" if EXPERT
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 5/7] x86: Consolidate PCI_MMCONFIG configs

From: Jan Kiszka <jan.kiszka at siemens.com>

Since e279b6c1d329 ("x86: start unification of arch/x86/Kconfig.*"),
we
have two PCI_MMCONFIG entries, one from the original i386 and another
from x86_64. This consolidates both entries into a single one.

Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
 arch/x86/Kconfig | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c19f5342ec2b..8986a6b6e3df 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2641,8 +2641,10 @@ config PCI_DIRECT
 	depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC
|| PCI_GOMMCONFIG))
 
 config PCI_MMCONFIG
-	def_bool y
-	depends on X86_32 && PCI && (ACPI || SFI) &&
(PCI_GOMMCONFIG || PCI_GOANY)
+	bool "Support mmconfig PCI config space access" if X86_64
+	default y
+	depends on PCI && (ACPI || SFI)
+	depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
 
 config PCI_OLPC
 	def_bool y
@@ -2657,11 +2659,6 @@ config PCI_DOMAINS
 	def_bool y
 	depends on PCI
 
-config PCI_MMCONFIG
-	bool "Support mmconfig PCI config space access"
-	default y
-	depends on X86_64 && PCI && (ACPI || SFI)
-
 config PCI_CNB20LE_QUIRK
 	bool "Read CNB20LE Host Bridge Windows" if EXPERT
 	depends on PCI
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 6/7] x86/jailhouse: Allow to use PCI_MMCONFIG without ACPI

From: Jan Kiszka <jan.kiszka at siemens.com>

Jailhouse does not use ACPI, but it does support MMCONFIG. Make sure the
latter can be built without having to enable ACPI as well. Primarily, we
need to make the AMD mmconf-fam10h_64 depend upon MMCONFIG and ACPI,
instead of just the former.

Saves some bytes in the Jailhouse non-root kernel.

Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
 arch/x86/Kconfig          | 6 +++++-
 arch/x86/kernel/Makefile  | 2 +-
 arch/x86/kernel/cpu/amd.c | 2 +-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8986a6b6e3df..08a3236cb6f2 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2643,7 +2643,7 @@ config PCI_DIRECT
 config PCI_MMCONFIG
 	bool "Support mmconfig PCI config space access" if X86_64
 	default y
-	depends on PCI && (ACPI || SFI)
+	depends on PCI && (ACPI || SFI || JAILHOUSE_GUEST)
 	depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
 
 config PCI_OLPC
@@ -2659,6 +2659,10 @@ config PCI_DOMAINS
 	def_bool y
 	depends on PCI
 
+config MMCONF_FAM10H
+	def_bool y
+	depends on PCI_MMCONFIG && ACPI
+
 config PCI_CNB20LE_QUIRK
 	bool "Read CNB20LE Host Bridge Windows" if EXPERT
 	depends on PCI
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 29786c87e864..73ccf80c09a2 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -146,6 +146,6 @@ ifeq ($(CONFIG_X86_64),y)
 	obj-$(CONFIG_GART_IOMMU)	+= amd_gart_64.o aperture_64.o
 	obj-$(CONFIG_CALGARY_IOMMU)	+= pci-calgary_64.o tce_64.o
 
-	obj-$(CONFIG_PCI_MMCONFIG)	+= mmconf-fam10h_64.o
+	obj-$(CONFIG_MMCONF_FAM10H)	+= mmconf-fam10h_64.o
 	obj-y				+= vsmp_64.o
 endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f0e6456ca7d3..12bc0a1139da 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -716,7 +716,7 @@ static void init_amd_k8(struct cpuinfo_x86 *c)
 
 static void init_amd_gh(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_X86_64
+#ifdef CONFIG_MMCONF_FAM10H
 	/* do this for boot cpu */
 	if (c == &boot_cpu_data)
 		check_enable_amd_mmconf_dmi();
-- 
2.13.6

Jan Kiszka

2018-Mar-04 18:31 UTC

head link

[PATCH v4 7/7] MAINTAINERS: Add entry for Jailhouse

From: Jan Kiszka <jan.kiszka at siemens.com>

Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
---
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4623caf8d72d..6dc0b8f3ae0e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7523,6 +7523,13 @@ Q:	http://patchwork.linuxtv.org/project/linux-media/list/
 S:	Maintained
 F:	drivers/media/dvb-frontends/ix2505v*
 
+JAILHOUSE HYPERVISOR INTERFACE
+M:	Jan Kiszka <jan.kiszka at siemens.com>
+L:	jailhouse-dev at googlegroups.com
+S:	Maintained
+F:	arch/x86/kernel/jailhouse.c
+F:	arch/x86/include/asm/jailhouse_para.h
+
 JC42.4 TEMPERATURE SENSOR DRIVER
 M:	Guenter Roeck <linux at roeck-us.net>
 L:	linux-hwmon at vger.kernel.org
-- 
2.13.6

Andy Shevchenko

2018-Mar-05 15:36 UTC

head link

[PATCH v4 3/7] x86/jailhouse: Enable PCI mmconfig access in inmates

On Sun, Mar 4, 2018 at 8:31 PM, Jan Kiszka <jan.kiszka at siemens.com>
wrote:> From: Otavio Pontes <otavio.pontes at intel.com>
>
> Use the PCI mmconfig base address exported by jailhouse in boot
> parameters in order to access the memory mapped PCI configuration space.
>
FWIW,
Reviewed-by: Andy Shevchenko <andy.shevchenko at gmail.com>
> Signed-off-by: Otavio Pontes <otavio.pontes at intel.com>
> [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG, used pcibios_last_bus]
> Signed-off-by: Jan Kiszka <jan.kiszka at siemens.com>
> ---
>  arch/x86/include/asm/pci_x86.h | 2 ++
>  arch/x86/kernel/jailhouse.c    | 8 ++++++++
>  arch/x86/pci/mmconfig-shared.c | 4 ++--
>  3 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/include/asm/pci_x86.h
b/arch/x86/include/asm/pci_x86.h
> index eb66fa9cd0fc..959d618dbb17 100644
> --- a/arch/x86/include/asm/pci_x86.h
> +++ b/arch/x86/include/asm/pci_x86.h
> @@ -151,6 +151,8 @@ extern int pci_mmconfig_insert(struct device *dev, u16
seg, u8 start, u8 end,
>                                phys_addr_t addr);
>  extern int pci_mmconfig_delete(u16 seg, u8 start, u8 end);
>  extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus);
> +extern struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int
start,
> +                                                       int end, u64 addr);
>
>  extern struct list_head pci_mmcfg_list;
>
> diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
> index b68fd895235a..fa183a131edc 100644
> --- a/arch/x86/kernel/jailhouse.c
> +++ b/arch/x86/kernel/jailhouse.c
> @@ -124,6 +124,14 @@ static int __init jailhouse_pci_arch_init(void)
>         if (pcibios_last_bus < 0)
>                 pcibios_last_bus = 0xff;
>
> +#ifdef CONFIG_PCI_MMCONFIG
> +       if (setup_data.pci_mmconfig_base) {
> +               pci_mmconfig_add(0, 0, pcibios_last_bus,
> +                                setup_data.pci_mmconfig_base);
> +               pci_mmcfg_arch_init();
> +       }
> +#endif
> +
>         return 0;
>  }
>
> diff --git a/arch/x86/pci/mmconfig-shared.c
b/arch/x86/pci/mmconfig-shared.c
> index 96684d0adcf9..0e590272366b 100644
> --- a/arch/x86/pci/mmconfig-shared.c
> +++ b/arch/x86/pci/mmconfig-shared.c
> @@ -94,8 +94,8 @@ static struct pci_mmcfg_region *pci_mmconfig_alloc(int
segment, int start,
>         return new;
>  }
>
> -static struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int
start,
> -                                                       int end, u64 addr)
> +struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
> +                                                int end, u64 addr)
>  {
>         struct pci_mmcfg_region *new;
>
> --
> 2.13.6
>


-- 
With Best Regards,
Andy Shevchenko

kbuild test robot

2018-Mar-06 00:41 UTC

head link

[PATCH v4 6/7] x86/jailhouse: Allow to use PCI_MMCONFIG without ACPI

Hi Jan,

I love your patch! Yet something to improve:

[auto build test ERROR on pci/next]
[also build test ERROR on v4.16-rc4 next-20180305]
[cannot apply to tip/x86/core]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]

url:   
https://github.com/0day-ci/linux/commits/Jan-Kiszka/jailhouse-Enhance-secondary-Jailhouse-guest-support-wrt-PCI/20180306-070138
base:   https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: i386-randconfig-x079-201809 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   arch/x86/kernel/cpu/amd.c: In function
'init_amd_gh':>> arch/x86/kernel/cpu/amd.c:722:3: error: implicit declaration of
function 'check_enable_amd_mmconf_dmi'
[-Werror=implicit-function-declaration]      check_enable_amd_mmconf_dmi();
      ^~~~~~~~~~~~~~~~~~~~~~~~~~~>> arch/x86/kernel/cpu/amd.c:724:2: error: implicit declaration of
function 'fam10h_check_enable_mmcfg'
[-Werror=implicit-function-declaration]     fam10h_check_enable_mmcfg();
     ^~~~~~~~~~~~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/check_enable_amd_mmconf_dmi +722 arch/x86/kernel/cpu/amd.c

0d96b9ff7 Yinghai Lu      2009-08-29  716  
26bfa5f89 Borislav Petkov 2014-06-24  717  static void init_amd_gh(struct
cpuinfo_x86 *c)
26bfa5f89 Borislav Petkov 2014-06-24  718  {
377b0048c Jan Kiszka      2018-03-04  719  #ifdef CONFIG_MMCONF_FAM10H
26bfa5f89 Borislav Petkov 2014-06-24  720  	/* do this for boot cpu */
26bfa5f89 Borislav Petkov 2014-06-24  721  	if (c == &boot_cpu_data)
26bfa5f89 Borislav Petkov 2014-06-24 @722  		check_enable_amd_mmconf_dmi();
26bfa5f89 Borislav Petkov 2014-06-24  723  
26bfa5f89 Borislav Petkov 2014-06-24 @724  	fam10h_check_enable_mmcfg();
26bfa5f89 Borislav Petkov 2014-06-24  725  #endif
6c62aa4a3 Yinghai Lu      2008-09-07  726  
6c62aa4a3 Yinghai Lu      2008-09-07  727  	/*
26bfa5f89 Borislav Petkov 2014-06-24  728  	 * Disable GART TLB Walk Errors on
Fam10h. We do this here because this
26bfa5f89 Borislav Petkov 2014-06-24  729  	 * is always needed when GART is
enabled, even in a kernel which has no
26bfa5f89 Borislav Petkov 2014-06-24  730  	 * MCE support built in. BIOS should
disable GartTlbWlk Errors already.
26bfa5f89 Borislav Petkov 2014-06-24  731  	 * If it doesn't, we do it here
as suggested by the BKDG.
26bfa5f89 Borislav Petkov 2014-06-24  732  	 *
26bfa5f89 Borislav Petkov 2014-06-24  733  	 * Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=33012
6c62aa4a3 Yinghai Lu      2008-09-07  734  	 */
26bfa5f89 Borislav Petkov 2014-06-24  735  	msr_set_bit(MSR_AMD64_MCx_MASK(4),
10);
6c62aa4a3 Yinghai Lu      2008-09-07  736  
26bfa5f89 Borislav Petkov 2014-06-24  737  	/*
26bfa5f89 Borislav Petkov 2014-06-24  738  	 * On family 10h BIOS may not have
properly enabled WC+ support, causing
26bfa5f89 Borislav Petkov 2014-06-24  739  	 * it to be converted to CD memtype.
This may result in performance
26bfa5f89 Borislav Petkov 2014-06-24  740  	 * degradation for certain
nested-paging guests. Prevent this conversion
26bfa5f89 Borislav Petkov 2014-06-24  741  	 * by clearing bit 24 in
MSR_AMD64_BU_CFG2.
26bfa5f89 Borislav Petkov 2014-06-24  742  	 *
26bfa5f89 Borislav Petkov 2014-06-24  743  	 * NOTE: we want to use the _safe
accessors so as not to #GP kvm
26bfa5f89 Borislav Petkov 2014-06-24  744  	 * guests on older kvm hosts.
26bfa5f89 Borislav Petkov 2014-06-24  745  	 */
26bfa5f89 Borislav Petkov 2014-06-24  746  	msr_clear_bit(MSR_AMD64_BU_CFG2,
24);
11fdd252b Yinghai Lu      2008-09-07  747  
26bfa5f89 Borislav Petkov 2014-06-24  748  	if (cpu_has_amd_erratum(c,
amd_erratum_383))
26bfa5f89 Borislav Petkov 2014-06-24  749  		set_cpu_bug(c,
X86_BUG_AMD_TLB_MMATCH);
11fdd252b Yinghai Lu      2008-09-07  750  }
11fdd252b Yinghai Lu      2008-09-07  751  

:::::: The code at line 722 was first introduced by commit
:::::: 26bfa5f89486a8926cd4d4ca81a04d3f0f174934 x86, amd: Cleanup init_amd

:::::: TO: Borislav Petkov <bp at suse.de>
:::::: CC: H. Peter Anvin <hpa at linux.intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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