In trampoline.S we have a short jmp after lmsw: trampoline_realmode_entry: mov %cs,%ax mov %ax,%ds movb $0xA5,bootsym(trampoline_cpu_started) cld cli lidt bootsym(idt_48) lgdt bootsym(gdt_48) xor %ax, %ax inc %ax lmsw %ax # CR0.PE = 1 (enter protected mode) mov $1,%bl # EBX != 0 indicates we are an AP jmp 1f 1: ljmpl $BOOT_CS32,$bootsym_phys(trampoline_protmode_entry) According to Intel Spec, it''s useless, do we have any special reason to have it there? BTW why put mov $1, %bl between lmsw and it''s corresponding ljmp? thanks -Xin _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
On 18/6/07 15:03, "Li, Xin B" <xin.b.li@intel.com> wrote:> According to Intel Spec, it''s useless, do we have any special reason to > have it there? > BTW why put mov $1, %bl between lmsw and it''s corresponding ljmp?Hmmm... I''m sure I read somewhere about a jmp to clear the prefetch queue, but reading the appropriate manual pages now I see I only need the ljmp. I''ll fix that and also move the write to %bx somewhere more sensible. Thanks, Keir _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
>> According to Intel Spec, it''s useless, do we have any >special reason to >> have it there? >> BTW why put mov $1, %bl between lmsw and it''s corresponding ljmp? > >Hmmm... I''m sure I read somewhere about a jmp to clear the >prefetch queue,Surely you did read it :-), in the latest Spec (version of May 2007), in17.29.3 Enabling and Disabling Paging, it''s said a near jump should be executed after set or clear PG flag in CR0, but it''s a different case since we are setting or clearing PE flag, probably plus PG changes too. -Xin>but reading the appropriate manual pages now I see I only need >the ljmp. >I''ll fix that and also move the write to %bx somewhere more sensible. > > Thanks, > Keir >_______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
On 19/6/07 03:03, "Li, Xin B" <xin.b.li@intel.com> wrote:>> Hmmm... I''m sure I read somewhere about a jmp to clear the >> prefetch queue, > > Surely you did read it :-), in the latest Spec (version of May 2007), > in17.29.3 Enabling and Disabling Paging, it''s said a near jump should be > executed after set or clear PG flag in CR0, but it''s a different case > since we are setting or clearing PE flag, probably plus PG changes too.But you never need a near jump *and* a long jump, it seems. Makes sense! -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
>But you never need a near jump *and* a long jump, it seems. >Makes sense! >Yeah, and I also saw Linux kernel i386 code uses a short jump after enabling PE in wakeup.S, which is not necessary. Acturally the code doesn''t make anything wrong, but it''s really confusing if thinking about the CPU state at that time interval. -Xin _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel