On Fri, Oct 2, 2015 at 6:14 PM, Robert Morell <rmorell at nvidia.com> wrote:> Hi Ilia, > > On Fri, Oct 02, 2015 at 06:05:21PM -0400, Ilia Mirkin wrote: >> Hi Robert, >> >> Thanks for the quick response! That goes in line with my observations >> which is that these things happen when using an ATOM/RED instruction. >> I've checked and rechecked that I'm generating ops with identical bits >> as what the proprietary driver does, however (and nvdisasm prints >> identical output). Could you advise what the proper way of indicating >> that the memory is "global" to the op? I'm sure I'm just missing >> something simple. If you show me what to look for in SM35 I can >> probably find it on my own for SM20/SM30/SM50. > > Unfortunately this isn't something I know a lot about, so I'm going to > have do some research and get back to you, hopefully within a few days.Hi Robert, Were you able to find any further information out about this? Happy to provide with any traces or additional details as to what I'm doing (and which is failing). Thanks, -ilia
Robert Morell
2015-Oct-26 20:02 UTC
[Nouveau] Documentation request for MP warp error 0x10
On Mon, Oct 26, 2015 at 03:28:59PM -0400, Ilia Mirkin wrote:> On Fri, Oct 2, 2015 at 6:14 PM, Robert Morell <rmorell at nvidia.com> wrote: > > Hi Ilia, > > > > On Fri, Oct 02, 2015 at 06:05:21PM -0400, Ilia Mirkin wrote: > >> Hi Robert, > >> > >> Thanks for the quick response! That goes in line with my observations > >> which is that these things happen when using an ATOM/RED instruction. > >> I've checked and rechecked that I'm generating ops with identical bits > >> as what the proprietary driver does, however (and nvdisasm prints > >> identical output). Could you advise what the proper way of indicating > >> that the memory is "global" to the op? I'm sure I'm just missing > >> something simple. If you show me what to look for in SM35 I can > >> probably find it on my own for SM20/SM30/SM50. > > > > Unfortunately this isn't something I know a lot about, so I'm going to > > have do some research and get back to you, hopefully within a few days. > > Hi Robert, > > Were you able to find any further information out about this? Happy to > provide with any traces or additional details as to what I'm doing > (and which is failing).I'm still waiting for clarification on some stuff I'm not sure about -- I'll try pinging a little harder. Sorry for the delay. - Robert
Robert Morell
2015-Nov-06 20:59 UTC
[Nouveau] Documentation request for MP warp error 0x10
On Fri, Oct 02, 2015 at 06:05:21PM -0400, Ilia Mirkin wrote:> Could you advise what the proper way of indicating > that the memory is "global" to the op? I'm sure I'm just missing > something simple. If you show me what to look for in SM35 I can > probably find it on my own for SM20/SM30/SM50.Sorry again for the delay. Here's what I've been able to find out about the generic thread address space (used by the SMs) and what types of memory it contains. Hopefully this clears things up. Local memory is a per-thread space. Shared memory is a per-CTA space (compute shaders only). LDL and STL instructions access local memory with a zero offset. LDS, LSDLK, STS, and STSCUL instructions access shared memory with a zero offset. LD, ST, RED, ATOM, and CCTL.D instructions access the generic thread address space, which is layered on top of the channel's virtual address space. In the generic thread address space, there are 16MB windows into local and shared memory; everything not in a Local or Shared address window accesses global virtual memory. The local window offset within the generic thread address space is determined by the SetShaderLocalMemoryWindow class method (offset 0x77c in classes *97 and *c0). The shared window offset within the generic thread address space is determined by the SetShaderSharedMemoryWindow class method (offset 0x214 in classes *c0). For both methods, the offset is in bytes, but the window must be aligned to a 16MB boundary (so the lower 24 bits of the data must be zero). The upper 32 bits of the windows are hard-coded to 0 (so they must be placed within the lower 4GB of address space). Generally, it is expected that software will reserve ranges in the global virtual address space where these windows will be placed. (Otherwise anything mapped there will be inaccessible to shaders.) For graphics shaders, the shared address space logic does not exist, so there is no need to reserve virtual memory for it. - Robert