llvm dev - Jan 2015 - [LLVMdev] Different instruction encodings based on subtarget features

I am working on an LLVM backend for the AVR architecture, and am having
troubles working with the codegen layer, trying to get around the quirks of
the binary encodings of the AVR ISR.

There are several different families of AVR microcontrollers, each with a
minimum 'core' instruction set. Each family builds upon (or removes) the
core ISR with more instructions or different encodings.

My context is that the binary encodings of certain instructions differ
solely with the 'AVR Tiny' family of devices (see the bottom row of the
tabled headed "Instruction set inheritance" linked here
<http://en.wikipedia.org/wiki/Atmel_AVR_instruction_set>). I have a
subtarget feature specifically for each CPU family.

What I would like to do is choose a different instruction encoding based on
whether or not the 'AVR Tiny' subtarget feature is enabled. I have found
this
<http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/055149.html>
link to a LLVMdev email which is quite dated, and if I may say so myself --
is a dirty hack.

Is there a way to do this without hacking the build system?
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Hi,

The Mips target is doing this for Mips32r6/Mips64r6 by defining two
instructions, one predicated on having a feature, the other on not having it.
The instruction selection then picks the right one for the subtarget. CLO and
CLO_R6 is a good example. A more complicated example is PseudoReturn, JR, and
JALR which is the same general idea but we use a Pseudo and select the real
instruction much later.

We also do this on a larger scale for microMIPS but I don't fully understand
the details of that code yet.
________________________________
From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf
of Dylan McKay [dylanmckay34 at gmail.com]
Sent: 30 January 2015 06:50
To: llvmdev at cs.uiuc.edu
Subject: [LLVMdev] Different instruction encodings based on subtarget features

I am working on an LLVM backend for the AVR architecture, and am having troubles
working with the codegen layer, trying to get around the quirks of the binary
encodings of the AVR ISR.

There are several different families of AVR microcontrollers, each with a
minimum 'core' instruction set. Each family builds upon (or removes) the
core ISR with more instructions or different encodings.

My context is that the binary encodings of certain instructions differ solely
with the 'AVR Tiny' family of devices (see the bottom row of the tabled
headed "Instruction set inheritance" linked
here<http://en.wikipedia.org/wiki/Atmel_AVR_instruction_set>). I have a
subtarget feature specifically for each CPU family.

What I would like to do is choose a different instruction encoding based on
whether or not the 'AVR Tiny' subtarget feature is enabled. I have found
this<http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/055149.html>
link to a LLVMdev email which is quite dated, and if I may say so myself -- is a
dirty hack.

Is there a way to do this without hacking the build system?
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