llvm dev - Nov 2019 - Understanding targets

The term "target" is somewhat overloaded.
When llvm-config tells you it was built with the X86 target, that actually
includes a variety of closely related architectures, such as x86_64, i386, and
so on.  Within the x86_64 architecture, there are many individual processor
implementations that LLVM understands, such as Skylake, Bulldozer, and many many
more.
What *clang* means by "target" is really the target triple, which
includes the architecture, OS, and sometimes other information.  For clang-cl
the default triple is likely something along the lines of
"x86_64-pc-msvc" and tends to be derived from the characteristics of
the environment where you are running clang.
Clang accepts a -target option which allows you to specify a different triple. 
The first component of the triple would have to be an architecture name that is
supported by one of the LLVM targets that clang was built with.  So, to support
triples starting with "x86_64" you would need a clang that includes
the X86 target, and so on.

Regarding the Mips target, it looks like the supported 32-bit architecture names
are "mips" and "mipsel" so you could experiment with using
triples starting with those strings.  I don't know anything in particular
about the Mips target other than what I just said.  I have cc'd the code
owner of the MIPS target, who might be able to help you there.
--paulr

From: cfe-dev <cfe-dev-bounces at lists.llvm.org> On Behalf Of Gaier,
Bjoern via cfe-dev
Sent: Wednesday, November 13, 2019 7:56 AM
To: Clang Dev <cfe-dev at lists.llvm.org>
Subject: [cfe-dev] Understanding targets

Heyho everyone,

I have a big noob question again! I basically want to know, how I can find out
which processors a certain installation of Clang supports and how do I change
the target processor.
Some background to make my question more clear:

Normally I develop applications for Windows and 64bit - back then using the MSVC
compiler. By now I changed to the fantastic Clang-Cl and didn't thought much
about processors - I take it automatically target x86-64 because of Visual
Studio?

However, I know that Clang supports more processors (or architectures? What is
the difference?) then x86-64. So I wanted to know, which are supported and how
do I tell Clang do use a different target?

To give even more background:
I used an old development environment, which provided compiler for the old
Playstation CPU - Wikipedia says it is a "32-bit RISC MIPS
R3000A-compatible MIPS R3051" (I simply thought it is a R3000). And I
started to wonder, how do I know if Clang supports that old CPU?

So I ran my llvm-config with --targets-built and got:
AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 NVPTX PowerPC RISCV Sparc
SystemZ WebAssembly X86 XCore

I see there "Mips" and "RISCV" but no RISC MIPS or even a
R3000 - does that now mean that Clang does not support does old processors? Or
does it? What do I do if I encounter a 'wild' Clang without llvm-config
- can I still find out its targets? I have no idea and this is why I'm
asking.

Thank you in advance for any help!

Kind greetings
Björn Gaier



Als GmbH eingetragen im Handelsregister Bad Homburg v.d.H. HRB 9816, USt.ID-Nr.
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On Wed, Nov 13, 2019 at 6:28 PM Robinson, Paul <paul.robinson at sony.com>
wrote:
>
> Regarding the Mips target, it looks like the supported 32-bit architecture
> names are “mips” and “mipsel” so you could experiment with using triples
> starting with those strings.  I don’t know anything in particular about
> the Mips target other than what I just said.  I have cc’d the code owner
> of the MIPS target, who might be able to help you there.
>> I see there “Mips” and “RISCV” but no RISC MIPS or even a R3000 – does
that
>> now mean that Clang does not support does old processors? Or does it?
What
>> do I do if I encounter a ‘wild’ Clang without llvm-config – can I still
find
>> out its targets? I have no idea and this is why I’m asking.
Now Clang accepts the following MIPS CPU names. This list can be found
in the "clang/lib/Basic/Targets/Mips.cpp". mips1 and mips5 accepted by
Clang, but unsupported by code generator. I'm going to remove them
from this list.

mips1, mips2, mips3, mips4, mips5,
mips32, mips32r2, mips32r3, mips32r5, mips32r6,
mips64, mips64r2, mips64r3, mips64r5, mips64r6,
octeon, octeon+, p5600

R3000 is a CPU implements mips1 instruction set architecture.
Unfortunately you cannot generate a code for this CPU using Clang.

-- 
Simon Atanasyan

> On Nov 13, 2019, at 07:48, Simon Atanasyan via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> On Wed, Nov 13, 2019 at 6:28 PM Robinson, Paul <paul.robinson at
sony.com> wrote:
>> 
>> Regarding the Mips target, it looks like the supported 32-bit
architecture
>> names are “mips” and “mipsel” so you could experiment with using
triples
>> starting with those strings.  I don’t know anything in particular about
>> the Mips target other than what I just said.  I have cc’d the code
owner
>> of the MIPS target, who might be able to help you there.
> 
>>> I see there “Mips” and “RISCV” but no RISC MIPS or even a R3000 –
does that
>>> now mean that Clang does not support does old processors? Or does
it? What
>>> do I do if I encounter a ‘wild’ Clang without llvm-config – can I
still find
>>> out its targets? I have no idea and this is why I’m asking.
> 
> Now Clang accepts the following MIPS CPU names. This list can be found
> in the "clang/lib/Basic/Targets/Mips.cpp". mips1 and mips5
accepted by
> Clang, but unsupported by code generator. I'm going to remove them
> from this list.
> 
> mips1, mips2, mips3, mips4, mips5,
> mips32, mips32r2, mips32r3, mips32r5, mips32r6,
> mips64, mips64r2, mips64r3, mips64r5, mips64r6,
> octeon, octeon+, p5600
> 
> R3000 is a CPU implements mips1 instruction set architecture.
> Unfortunately you cannot generate a code for this CPU using Clang.
We never implemented mips1 codegen as it was orders of magnitude harder than
mips2 (mostly because of the delay slots on load instructions) and there's
no 'generic' mips1 target (because coprocessor 0 wasn't
standardized).
However, we had mips2 working as it was needed to build for Debian. Did it get
broken or did they move their mips port up to something more recent?
I think David is actively using mips4 too. @David: Is that right?
> -- 
> Simon Atanasyan
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

Hello Paul and Simon, (Sorry - I'm not sure about the social conventions in
mailing lists)

Both of your answers helped me a lot! So If I understand it correctly, Clang
knows what 'mips1' and 'mips5' are - but can't generate code
for it? Why is it like that?

I actually have a more in general questions about processors... If this is the
wrong place for it, please ignore it, I'm just a bit confused.
So the R3000 is a "MIPS CPU"? What does that actually mean? Is the
architecture MIPS? Or the producer? When I go to Wikipedia I see MIPS as the
designer, so I take it is like saying "Intel CPU" or "AMD
CPU" but that does not tell me anything about the assembly instruction it
uses, right?
But then also I see as Design "RISC", as I understood it describes the
assembly instructions? But why would I tell Clang to target "mips1"
when the design of the R3000 is RISC? Why isn't RISCV correct then? Or RISC1
or so...

Also how does that influence floating point arithmetic? I often heard that those
are separated processors FPUs(?). So could it be, that there is an additional
processor besides the processor I know about? Like R3000 + FPU? Wouldn't had
Clang or any other compiler to know about such a construct or is that not the
case?

Sorry again if this is too much off topic - I simply never thought about such
stuff before °/////°

Thank you in advance and kind greetings
Björn



-----Original Message-----
From: Simon Atanasyan <simon at atanasyan.com>
Sent: 13 November 2019 16:49
To: Robinson, Paul <paul.robinson at sony.com>
Cc: Gaier, Bjoern <Bjoern.Gaier at horiba.com>; llvm-dev at lists.llvm.org
Subject: Re: Understanding targets

On Wed, Nov 13, 2019 at 6:28 PM Robinson, Paul <paul.robinson at sony.com>
wrote:
>
> Regarding the Mips target, it looks like the supported 32-bit
> architecture names are “mips” and “mipsel” so you could experiment
> with using triples starting with those strings.  I don’t know anything
> in particular about the Mips target other than what I just said.  I
> have cc’d the code owner of the MIPS target, who might be able to help you
there.
>> I see there “Mips” and “RISCV” but no RISC MIPS or even a R3000 –
>> does that now mean that Clang does not support does old processors?
>> Or does it? What do I do if I encounter a ‘wild’ Clang without
>> llvm-config – can I still find out its targets? I have no idea and this
is why I’m asking.
Now Clang accepts the following MIPS CPU names. This list can be found in the
"clang/lib/Basic/Targets/Mips.cpp". mips1 and mips5 accepted by Clang,
but unsupported by code generator. I'm going to remove them from this list.

mips1, mips2, mips3, mips4, mips5,
mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2, mips64r3,
mips64r5, mips64r6, octeon, octeon+, p5600

R3000 is a CPU implements mips1 instruction set architecture.
Unfortunately you cannot generate a code for this CPU using Clang.

--
Simon Atanasyan
Als GmbH eingetragen im Handelsregister Bad Homburg v.d.H. HRB 9816, USt.ID-Nr.
DE 114 165 789 Geschäftsführer: Dr. Hiroshi Nakamura, Dr. Robert Plank, Markus
Bode, Heiko Lampert, Takashi Nagano, Takeshi Fukushima. Junichi Tajika