llvm dev - Sep 2016 - memory access after optimization

Hi everyone,

I was wondering how memory is accessed after optimizing the code. In other
words, are memory accesses done via load and store instructions even at
optimization level O2 or other instructions (can) access memory too?

Best,
Mohammad
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You need to say what kind of code representation you are talking about.

LLVM IR always uses pure loads and stores to or from virtual (unlimited)
registers.

Code generated for RISC architectures such as ARM or PowerPC always uses
pure loads and stores, as that is all they have.

Code generated for CISC architectures such as x86 combines loads and stores
with arithmetic instructions when appropriate.

On Wed, Sep 7, 2016 at 4:02 PM, Mohammad Norouzi via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi everyone,
>
> I was wondering how memory is accessed after optimizing the code. In other
> words, are memory accesses done via load and store instructions even at
> optimization level O2 or other instructions (can) access memory too?
>
> Best,
> Mohammad
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
>
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