Peng Cheng
2015-May-18 20:06 UTC
[LLVMdev] "two address instruction invalid" assertion in TwoAddressInstructionPass
Here is a simple llvm ir at the end. When I ran "lli -O0" on it, I
got:
lli: .../TwoAddressInstructionPass.cpp:1314: bool
{anonymous}::TwoAddressInstructionPass::collectTiedOperands(llvm::MachineInstr*,
{anonymous}::TwoAddressInstructionPass::TiedOperandMap&): Assertion `SrcReg
&& SrcMO.isUse() && "two address instruction
invalid"' failed.
Is this an IR issue or bug somewhere?
Thanks,
-Peng
---- <begin> ----
; ModuleID = 'module_name'
%0 = type <{ double*, i1* }>
define void @main(double*, %0* %t0) {
entry:
br label %1
; <label>:1 ; preds = %entry
%2 = getelementptr inbounds %0* %t0, i64 0, i32 1
%3 = load i1** %2, align 8
%4 = load i1* %3, align 1
%5 = getelementptr inbounds %0* %t0, i64 0, i32 0
%6 = load double** %5, align 8
%7 = load double* %6, align 8
%8 = fcmp ogt double %7, -1.000000e-01
%9 = select i1 %8, double 1.000000e+00, double 0.000000e+00
%10 = select i1 %4, double %9, double 1.000000e+00
store double %10, double* %0, align 8
ret void
}
---- <end> ----
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Peng Cheng
2015-May-18 20:09 UTC
[LLVMdev] Fwd: "two address instruction invalid" assertion in TwoAddressInstructionPass
It is tested on 3.5 on linux 64 platform.
---------- Forwarded message ----------
From: Peng Cheng <gm4cheng at gmail.com>
Date: Mon, May 18, 2015 at 4:06 PM
Subject: "two address instruction invalid" assertion in
TwoAddressInstructionPass
To: "LLVMdev at cs.uiuc.edu" <LLVMdev at cs.uiuc.edu>
Here is a simple llvm ir at the end. When I ran "lli -O0" on it, I
got:
lli: .../TwoAddressInstructionPass.cpp:1314: bool
{anonymous}::TwoAddressInstructionPass::collectTiedOperands(llvm::MachineInstr*,
{anonymous}::TwoAddressInstructionPass::TiedOperandMap&): Assertion `SrcReg
&& SrcMO.isUse() && "two address instruction
invalid"' failed.
Is this an IR issue or bug somewhere?
Thanks,
-Peng
---- <begin> ----
; ModuleID = 'module_name'
%0 = type <{ double*, i1* }>
define void @main(double*, %0* %t0) {
entry:
br label %1
; <label>:1 ; preds = %entry
%2 = getelementptr inbounds %0* %t0, i64 0, i32 1
%3 = load i1** %2, align 8
%4 = load i1* %3, align 1
%5 = getelementptr inbounds %0* %t0, i64 0, i32 0
%6 = load double** %5, align 8
%7 = load double* %6, align 8
%8 = fcmp ogt double %7, -1.000000e-01
%9 = select i1 %8, double 1.000000e+00, double 0.000000e+00
%10 = select i1 %4, double %9, double 1.000000e+00
store double %10, double* %0, align 8
ret void
}
---- <end> ----
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