Kevin Qin
2014-Feb-19 09:09 UTC
[LLVMdev] How to implement register allocation constraints to guide allocator dispatching different registers for certain instruction?
Hi, To fix this bug(http://llvm.org/bugs/show_bug.cgi?id=18881), we need to add more register constraints that for STLXR , Ws and Wt should not be the same register. Because these unpredictable instructions are valid instructions in MC layer, we couldn't just simply treat them as unallocated encoding. I suppose to add some extra rules on register allocator to avoid it allocating register causing any unpredictable behavior, but I don't have experience to this part. Can anybody tell me how to implement this or have better ideas to solve this problem? Thanks in advance. -- Best Regards, Kevin Qin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140219/d4c3010b/attachment.html>
Tim Northover
2014-Feb-19 11:27 UTC
[LLVMdev] How to implement register allocation constraints to guide allocator dispatching different registers for certain instruction?
Hi Kevin,> I suppose to add some extra rules on register allocator to avoid it > allocating register causing any unpredictable behavior, but I don't have > experience to this part. Can anybody tell me how to implement this or have > better ideas to solve this problem? Thanks in advance.I think this is what the "@earlyclobber" constraint is for: if you mark the status output register as @earlyclobber then LLVM will think it gets written early on during the instruction (i.e. before the CPU would get a chance to read the other two) and make sure it gets allocated to a different register. Cheers. Tim.
Quentin Colombet
2014-Feb-19 17:35 UTC
[LLVMdev] How to implement register allocation constraints to guide allocator dispatching different registers for certain instruction?
Hi Kevin, I concur Tim’s advice, you should use the @earlyclobber. Cheers, -Quentin On Feb 19, 2014, at 3:27 AM, Tim Northover <t.p.northover at gmail.com> wrote:> Hi Kevin, > >> I suppose to add some extra rules on register allocator to avoid it >> allocating register causing any unpredictable behavior, but I don't have >> experience to this part. Can anybody tell me how to implement this or have >> better ideas to solve this problem? Thanks in advance. > > I think this is what the "@earlyclobber" constraint is for: if you > mark the status output register as @earlyclobber then LLVM will think > it gets written early on during the instruction (i.e. before the CPU > would get a chance to read the other two) and make sure it gets > allocated to a different register. > > Cheers. > > Tim. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
Reasonably Related Threads
- [LLVMdev] How to implement register allocation constraints to guide allocator dispatching different registers for certain instruction?
- [LLVMdev] Early-clobber constraint in TableGen
- [LLVMdev] Early-clobber constraint in TableGen
- [LLVMdev] inline asm constraints examples/tests
- [LLVMdev] Early-clobber constraint in TableGen