Per Fagrell
2010-Dec-15 08:28 UTC
[LLVMdev] Optimization passes break machine instructions on new backend
Hello!
I'm working on a new back-end and have hit a bit of a snag. I'm working
on
getting selectcc working and have followed the MSP430 model of emitting a
custom CMP and SELECT_CC node and matching that with a pseudo-instruction
that has useCustomEmitter=1. However, my output ends up very wrong, despite
the Machine code being initially correct:
# Machine code for function func:
Function Live Ins: %R0 in reg%16384, %R1 in reg%16385, %R2 in reg%16386, %R3
in reg%16387
Function Live Outs: %R0
BB#0: derived from LLVM BB %entry
Live Ins: %R0 %R1 %R2 %R3
%reg16387<def> = COPY %R3; IntRegs:%reg16387
%reg16386<def> = COPY %R2; IntRegs:%reg16386
%reg16385<def> = COPY %R1; IntRegs:%reg16385
%reg16384<def> = COPY %R0; IntRegs:%reg16384
%reg16390<def> = MOVE %reg16386; IntRegs:%reg16390,16386
%reg16388<def> = CMPrr %reg16384, %reg16385,
%CFR<imp-def,dead>;
IntRegs:%reg16388,16384,16385
SKIPCOND 1, %CFR<imp-use>
Successors according to CFG: BB#2 BB#1
BB#1: derived from LLVM BB %entry
Predecessors according to CFG: BB#0
%reg16391<def> = MOVE %reg16387; IntRegs:%reg16391,16387
Successors according to CFG: BB#2
BB#2: derived from LLVM BB %entry
Predecessors according to CFG: BB#0 BB#1
%reg16389<def> = PHI %reg16390, <BB#0>, %reg16391,
<BB#1>;
IntRegs:%reg16389,16390,16391
%R0<def> = COPY %reg16389; IntRegs:%reg16389
RET
# End machine code for function func.
-print-before-all indicates that the machines code sinking pass is wrecking
this, because after that the machine code becomes:
# Machine code for function func:
Function Live Ins: %R0 in reg%16384, %R1 in reg%16385, %R2 in reg%16386, %R3
in reg%16387
Function Live Outs: %R0
BB#0: derived from LLVM BB %entry
Live Ins: %R0 %R1 %R2 %R3
%reg16387<def> = COPY %R3; IntRegs:%reg16387
%reg16386<def> = COPY %R2; IntRegs:%reg16386
%reg16385<def> = COPY %R1; IntRegs:%reg16385
%reg16384<def> = COPY %R0; IntRegs:%reg16384
%reg16390<def> = MOVE %reg16386; IntRegs:%reg16390,16386
SKIPCOND 1, %CFR<imp-use>
Successors according to CFG: BB#2 BB#1
BB#1: derived from LLVM BB %entry
Predecessors according to CFG: BB#0
%reg16391<def> = MOVE %reg16387; IntRegs:%reg16391,16387
Successors according to CFG: BB#2
BB#2: derived from LLVM BB %entry
Predecessors according to CFG: BB#0 BB#1
%reg16389<def> = PHI %reg16390, <BB#0>, %reg16391,
<BB#1>;
IntRegs:%reg16389,16390,16391
%reg16388<def> = CMPrr %reg16384, %reg16385,
%CFR<imp-def,dead>;
IntRegs:%reg16388,16384,16385
%R0<def> = COPY %reg16389; IntRegs:%reg16389
RET
# End machine code for function func.
The CMPrr instruction is moved down to after the PHI node. My guess is that
the 'dead' in CFR<imp-def,dead> is to blame, but I can't see
what I'm doing
differently from MSP430/sparc that makes this not work. Any help GREATLY
appreciated!
//Per
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Anton Korobeynikov
2010-Dec-15 09:02 UTC
[LLVMdev] Optimization passes break machine instructions on new backend
Hello Per,> The CMPrr instruction is moved down to after the PHI node. My guess is that > the 'dead' in CFR<imp-def,dead> is to blame, but I can't see what I'm doing > differently from MSP430/sparc that makes this not work. Any help GREATLY > appreciated!It seems like no use of CFR after CMP, indeed. How condbranches on your platform look like (patterns, etc.) ? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
Per Fagrell
2010-Dec-15 09:11 UTC
[LLVMdev] Optimization passes break machine instructions on new backend
But in the first version it's used on the next row:
%reg16388<def> = CMPrr %reg16384, %reg16385,
%CFR<imp-def,dead>;
IntRegs:%reg16388,16384,16385
SKIPCOND 1, *%CFR<imp-use>*
Or doesn't that count?
Following are patters for cmp and skipcond:
def cmpcc : SDNode<"CSISD::CMP", SDTIntBinOp, [SDNPOutFlag]>;
let Defs = [CFR] in {
def CMPrr : InstCS<(outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
"cmp $c, $dst",
[(set IntRegs:$dst, (cmpcc IntRegs:$b, IntRegs:$c)),
(implicit CFR)]>;
}
let Uses = [CFR], isBranch = 1, isTerminator = 1 in
def SKIPCOND : InstCS<(outs), (ins CCOp:$cc),
"s$cc",
[(skipcc imm:$cc)]>;
On Wed, Dec 15, 2010 at 10:02 AM, Anton Korobeynikov <
anton at korobeynikov.info> wrote:
> Hello Per,
>
> > The CMPrr instruction is moved down to after the PHI node. My guess is
> that
> > the 'dead' in CFR<imp-def,dead> is to blame, but I
can't see what I'm
> doing
> > differently from MSP430/sparc that makes this not work. Any help
GREATLY
> > appreciated!
> It seems like no use of CFR after CMP, indeed. How condbranches on
> your platform look like (patterns, etc.) ?
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>
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