Hi Is it allowed to have registers alias within a register class ? thanks shrey
I think llvm codegen can allow this but currently there is no tablegen syntax that can specify this kind of aliasing. Evan On Mar 16, 2010, at 7:26 PM, shreyas krishnan wrote:> Hi > Is it allowed to have registers alias within a register class ? > > thanks > shrey > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev