llvm dev - Oct 2008 - [LLVMdev] clobbering other physical registers in storeRegtoStackSlot.

In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some other
physical register which may be holding a live value used somewhere else. How do
I make regalloc aware so that it saves the value before storeRegToStackSlot and
make it available again at the point of earlier use?

TIA,
Sanjiv
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On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote:
> In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some  
> other physical register which may be holding a live value used  
> somewhere else. How do I make regalloc aware so that it saves the  
> value before storeRegToStackSlot and make it available again at the  
> point of earlier use?
>
Typical solution is to either reserve a register for these purposes so  
the backend does not have to worry about its value being clobbered. A  
better solution would be to teach these routines to make use of the  
register scavenger (or rather the callers should use the scavenger and  
pass the handle to these routines) to find a scratch register. It will  
require some changes to the target independent portion of codegen  
though.

Evan
>
>
> TIA,
> Sanjiv
>
> _______________________________________________
> LLVM Developers mailing list
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On Thu, 2008-10-23 at 11:17 -0700, Evan Cheng wrote:
> 
> On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote:
> 
> > In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some
> > other physical register which may be holding a live value used
> > somewhere else. How do I make regalloc aware so that it saves the
> > value before storeRegToStackSlot and make it available again at the
> > point of earlier use?
> > 
> > 
> 
> 
> Typical solution is to either reserve a register for these purposes so
> the backend does not have to worry about its value being clobbered.
We have only one register (BSR) which we need to set correctly before
every load/store.  Setting up this register is done via an operation
called 'banksel'. 

The problem is that spill/reload gets in between a banksel and
load/store operation; and these spill/reload also modify BSR. Regalloc
fails to recognize this and does not ReMat 'banksel' again before the
load/store.
>  A better solution would be to teach these routines to make use of the
> register scavenger (or rather the callers should use the scavenger and
> pass the handle to these routines) to find a scratch register. It will
> require some changes to the target independent portion of codegen
> though.
> 
> 
> Evan
> > 
> > 
> > TIA,
> > Sanjiv
> > 
> > 
> > 
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev