Chris Lattner wrote:
> > > I'm not sure either. Can you send the code before and after
register
> > > allocation?
> >
> > Attached.
>
> Okay, yeah the spill code looks right. The local allocator can't keep
> virtual registers in physical registers across basic blocks. As such, the
> vregs are spilled at the end of the entry block and then reloaded in the
> blocks they are used.
Oh, I now understand why you say default allocator is not very
efficient.> > Ehm.... I get this:
> >
> > llc: LiveIntervals.cpp:166: virtual bool
> > llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&):
> > Assertion `r2iit != r2iMap_.end()' failed.
>
> Hrm, that's obviously really bad. Can you send me (offline) the output
of
> llc with the -debug option set and with this code before the assert:
>
> std::cerr << "MI: " << i << " "
<< reg << " "; mii->dump();
>
> Also note that it looks like your tree is a bit out of date. You might
> try updating and see if it helps the problem.
I've updated and rebuild. The bug is still there and the output you've
asked
for is attached.
HTH,
Volodya
-------------- next part --------------
Instruction: %tmp.9 = shl int %tmp.8, ubyte 1 ; <int> [#uses=1]
Machine Function
********** REWRITING TWO-ADDR INSTRS **********
********** Function: _Z3addii
********** COMPUTING LIVE INTERVALS **********
********** Function: _Z3addii
entry:
0 %reg1024 = load <fi#-1>
register: %reg1024 +[20,22) +[32,34) +[2,20)
4 %reg1025 = load <fi#-2>
register: %reg1025 +[20,22) +[32,34) +[6,20)
8 setcc %reg1024, %reg1025
12 goto %disp(label then)
16 goto %disp(label else)
then:
20 %reg1026 = + %reg1025, %reg1024
register: %reg1026 +[22,26)
24 %gr7 = move %reg1026
register: gr7 dead +[26,27)
28 return
else:
32 %reg1027 = + %reg1025, %reg1024
register: %reg1027 +[34,35)
36 %gr7 = move %reg1028
register: gr7 dead +[38,39)
40 return
********** JOINING INTERVALS ***********
entry:
0 %reg1024 = load <fi#-1>
4 %reg1025 = load <fi#-2>
8 setcc %reg1024, %reg1025
12 goto %disp(label then)
16 goto %disp(label else)
then:
20 %reg1026 = + %reg1025, %reg1024
24 %gr7 = move %reg1026
28 return
else:
32 %reg1027 = + %reg1025, %reg1024
36 %gr7 = move %reg1028
40 return
MI: 0 1024 %reg1024 = load <fi#-1>
MI: 0 1025 %reg1025 = load <fi#-2>
MI: 0 1024 setcc %reg1024, %reg1025
MI: 1 1025 setcc %reg1024, %reg1025
MI: 0 1026 %reg1026 = + %reg1025, %reg1024
MI: 1 1025 %reg1026 = + %reg1025, %reg1024
MI: 2 1024 %reg1026 = + %reg1025, %reg1024
MI: 1 1026 %gr7 = move %reg1026
MI: 0 1027 %reg1027 = + %reg1025, %reg1024
MI: 1 1025 %reg1027 = + %reg1025, %reg1024
MI: 2 1024 %reg1027 = + %reg1025, %reg1024
MI: 1 1028 %gr7 = move %reg1028
llc: LiveIntervals.cpp:161: virtual bool
llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&): Assertion
`r2iit != r2iMap_.end()' failed.
Code after instruction selection
# Machine code for _Z3addii():
<fi #-2> is 4 bytes fixed at location [SP-20]
<fi #-1> is 4 bytes fixed at location [SP-16]
entry (0x86b5128):
%reg1024 = load <fi#-1>
%reg1025 = load <fi#-2>
setcc %reg1024, %reg1025
goto %disp(label then)
goto %disp(label else)
then (0x86b5358):
%reg1026 = + %reg1025, %reg1024
%gr7 = move %reg1026
return
else (0x86b52b0):
%reg1027 = + %reg1025, %reg1024
%gr7 = move %reg1028
return
# End machine code for _Z3addii().
llc[0x85670a6]
llc[0x85672c6]
[0xffffe420]