Hi I have ported Tremor, the lowmem version to the C6416 DSP. I will now try to accelerate some part of the code in an FPGA as co-processor. I think that the most suitable part of the code to accelerate would be the MDCT. Therefore I have some questions on the MDCT. 1. What is the difference between the two MDCT implementations in normal Tremor and lowmem-Tremor? 2. Is the MDCT implementations some sort of "standard MDCT" that is used by other codecs? Or is it a hack just for Tremor? Does it have a name? 3. Is it possible to find IP-blocks for such an MDCT implementation to FPGAs? For example from opencores or some FPGA vendor? I wold like to replace the whole MDCT calculation part with an already existing IP block. That will however require that the MDCT implementation in Tremor is "standard" or that someone already have implemented it into an FPGA. Otherwise I will try to write one myself or at least part of it. /Henric