Syslinux - May 2006 - [PATCH 1/1] mboot.c32: fix register constraints bug

From: Tim Deegan <Tim.Deegan at cl.cam.ac.uk>

Fix register constraints of final jump to kernel entry.  
When compiled with some GCC versions, mboot.c32 would clobber the kernel
load address and try to jump to 0x2badb002.

Signed-off-by: Tim Deegan <Tim.Deegan at cl.cam.ac.uk>

---
--- syslinux-3.20-pre8/com32/modules/mboot.c.orig	2006-05-22 11:06:17.000000000
+0100
+++ syslinux-3.20-pre8/com32/modules/mboot.c	2006-05-24 09:37:14.000000000 +0100
@@ -879,7 +879,7 @@
 
         "jmp *%1"
 
-        : : "m" (mbi_run_addr), "r" (entry));
+        : : "m" (mbi_run_addr), "c" (entry));
 
 }
 static void trampoline_end(void) {}

Tim Deegan wrote:
> From: Tim Deegan <Tim.Deegan at cl.cam.ac.uk>
> 
> Fix register constraints of final jump to kernel entry.  
> When compiled with some GCC versions, mboot.c32 would clobber the kernel
> load address and try to jump to 0x2badb002.
> 
A cleaner way to do this would be:

asm volatile("jmp *%1"
              : : "b" (mbi_run_addr),
         	 "a" (0x2badb002),
                  "cdSI" (entry));

... instead of having explicit mov's which could clobber what gcc has 
set up.

	-hpa

H. Peter Anvin wrote:
> 
> asm volatile("jmp *%1"
>              : : "b" (mbi_run_addr),
>              "a" (0x2badb002),
>                  "cdSI" (entry));
> 
"cdSI" should of course have been "cdSD".

	-hpa

From: Tim Deegan <Tim.Deegan at cl.cam.ac.uk>

Fix register constraints of final jump to kernel entry.  
When compiled with some GCC versions, mboot.c32 would clobber the kernel
load address and try to jump to 0x2badb002.

Signed-off-by: Tim Deegan <Tim.Deegan at cl.cam.ac.uk>

---
--- syslinux-3.20-pre8/com32/modules/mboot.c.orig	2006-05-22 11:06:17.000000000
+0100
+++ syslinux-3.20-pre8/com32/modules/mboot.c	2006-05-24 17:34:47.000000000 +0100
@@ -856,31 +856,19 @@
         }
     }
 
-    /* Now set up the last tiny bit of Multiboot environment... */
-
-    asm volatile(
-
-        /* A20 is already enabled.
-         * CR0 already has PG cleared and PE set.
-         * EFLAGS already has VM and IF cleared.
-         * ESP is the kernels' problem.
-         * GDTR is the kernel's problem.
-         * CS is already a 32-bit, 0--4G code segments.
-         * DS, ES, FS and GS are already 32-bit, 0--4G data segments.
-         * EBX must point to the MBI: */
-
-        "movl %0, %%ebx;"
-
-        /* EAX must be the Multiboot magic number. */
-
-        "movl $0x2badb002, %%eax;"
-
-        /* Start the kernel. */
-
-        "jmp *%1"
-
-        : : "m" (mbi_run_addr), "r" (entry));
+    /* Now set up the last tiny bit of Multiboot environment.
+     * A20 is already enabled.
+     * CR0 already has PG cleared and PE set.
+     * EFLAGS already has VM and IF cleared.
+     * ESP is the kernels' problem.
+     * GDTR is the kernel's problem.
+     * CS is already a 32-bit, 0--4G code segments.
+     * DS, ES, FS and GS are already 32-bit, 0--4G data segments.
+     *
+     * EAX must be 0x2badb002 and EBX must point to the MBI when we jump. */
 
+    asm volatile ("jmp *%2" 
+                  : : "a" (0x2badb002), "b" (mbi_run_addr),
"cdSD" (entry));
 }
 static void trampoline_end(void) {}