Xen devel - Dec 2013 - [PATCH] pv/pvh: disable MTRR feature on cpuid for Dom0

MTRR is not available for PV/PVH Dom0, so prevent cpuid from
reporting it as an available feature.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Mukesh Rathor <mukesh.rathor@oracle.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Keir Fraser <keir@xen.org>
---
 xen/arch/x86/traps.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 940bc33..73b58dc 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -796,6 +796,7 @@ void pv_cpuid(struct cpu_user_regs *regs)
         __clear_bit(X86_FEATURE_DS, &d);
         __clear_bit(X86_FEATURE_ACC, &d);
         __clear_bit(X86_FEATURE_PBE, &d);
+        __clear_bit(X86_FEATURE_MTRR, &d);
 
         __clear_bit(X86_FEATURE_DTES64 % 32, &c);
         __clear_bit(X86_FEATURE_MWAIT % 32, &c);
-- 
1.7.7.5 (Apple Git-26)


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>>> On 12.12.13 at 17:52, Roger Pau Monne <roger.pau@citrix.com>
wrote:
> MTRR is not available for PV/PVH Dom0, so prevent cpuid from
> reporting it as an available feature.
Some misunderstanding perhaps? PV certainly has MTRR support for
Dom0 - see XENPF_*_memtype.
> --- a/xen/arch/x86/traps.c
> +++ b/xen/arch/x86/traps.c
> @@ -796,6 +796,7 @@ void pv_cpuid(struct cpu_user_regs *regs)
>          __clear_bit(X86_FEATURE_DS, &d);
>          __clear_bit(X86_FEATURE_ACC, &d);
>          __clear_bit(X86_FEATURE_PBE, &d);
> +        __clear_bit(X86_FEATURE_MTRR, &d);
Thus clearing this flag should be limited to PVH.

Jan

On 13/12/13 12:28, Jan Beulich wrote:
>>>> On 12.12.13 at 17:52, Roger Pau Monne
<roger.pau@citrix.com> wrote:
>> MTRR is not available for PV/PVH Dom0, so prevent cpuid from
>> reporting it as an available feature.
> 
> Some misunderstanding perhaps? PV certainly has MTRR support for
> Dom0 - see XENPF_*_memtype.
OK, my bad, I was looking for a PV implementation of struct mtrr_ops in
the pvops kernel, but Linux pvops doesn''t use MTRR at all, also none of
the XENPF_*_memtype ops seem to be used.
>
>> --- a/xen/arch/x86/traps.c
>> +++ b/xen/arch/x86/traps.c
>> @@ -796,6 +796,7 @@ void pv_cpuid(struct cpu_user_regs *regs)
>>          __clear_bit(X86_FEATURE_DS, &d);
>>          __clear_bit(X86_FEATURE_ACC, &d);
>>          __clear_bit(X86_FEATURE_PBE, &d);
>> +        __clear_bit(X86_FEATURE_MTRR, &d);
> 
> Thus clearing this flag should be limited to PVH.
Will resend now with this fixed, thanks.

Roger.