Does Xen GIC implementation use Grp0 as secure and Grp 1 as NS as mentioned in GIC 400 manual -- When a GIC that implements the GIC Security Extensions is connected to a processor that implements the ARM Security Extensions: Group 0 interrupts are Secure interrupts, and Group 1 interrupts are Non-secure interrupts. ARM IHI 0048B.b Non-Confidential ID072613 Pg 1-16 --- The manual also states In GICv2, ARM recommends that separate registers are used to manage Group 0 and Group 1 interrupts: GICV_IAR, GICV_EOIR, and GICV_HPPIR for Group 0 interrupts GICV_AIAR, GICV_AEOIR, and GICV_AHPPIR for Group 1 interrupts. pg 5-162 I was not able to find GICV_AIAR being used in code.
Slight modification GICC_AIAR (%s/GICV/GICC/g) On Mon, Oct 28, 2013 at 4:57 PM, Mj Embd <mj.embd@gmail.com> wrote:> Does Xen GIC implementation use Grp0 as secure and Grp 1 as NS as > mentioned in GIC 400 manual > -- > When a GIC that implements the GIC Security Extensions is connected to > a processor that implements the ARM Security Extensions: > > Group 0 interrupts are Secure interrupts, and Group 1 interrupts are > Non-secure interrupts. > > > ARM IHI 0048B.b Non-Confidential ID072613 Pg 1-16 > --- > > The manual also states > > In GICv2, ARM recommends that separate registers are used to manage > Group 0 and Group 1 interrupts: > > GICV_IAR, GICV_EOIR, and GICV_HPPIR for Group 0 interrupts GICV_AIAR, > GICV_AEOIR, and GICV_AHPPIR for Group 1 interrupts. > > pg 5-162 > > > I was not able to find GICV_AIAR being used in code.-- -mj
On 10/28/2013 04:29 AM, Mj Embd wrote:> Slight modification GICC_AIAR (%s/GICV/GICC/g) > > On Mon, Oct 28, 2013 at 4:57 PM, Mj Embd <mj.embd@gmail.com> wrote: >> Does Xen GIC implementation use Grp0 as secure and Grp 1 as NS as >> mentioned in GIC 400 manual >> -- >> When a GIC that implements the GIC Security Extensions is connected to >> a processor that implements the ARM Security Extensions: >> >> Group 0 interrupts are Secure interrupts, and Group 1 interrupts are >> Non-secure interrupts. >> >> >> ARM IHI 0048B.b Non-Confidential ID072613 Pg 1-16 >> --- >> >> The manual also states >> >> In GICv2, ARM recommends that separate registers are used to manage >> Group 0 and Group 1 interrupts: >> >> GICV_IAR, GICV_EOIR, and GICV_HPPIR for Group 0 interrupts GICV_AIAR, >> GICV_AEOIR, and GICV_AHPPIR for Group 1 interrupts. >> >> pg 5-162 >> >> >> I was not able to find GICV_AIAR being used in code.Xen is running in non-secure mode. The register GICC_AIAR is only used for secure mode. Actually in secure mode, it''s an alias to GICC_IAR. -- Julien Grall
Thanks. I found it mentioned in the manual. Julien I had asked a question titled "ARM GIC virtualization question", till now no one has responded, If it is possible can you please help me out with it. On Mon, Oct 28, 2013 at 8:30 PM, Julien Grall <julien.grall@linaro.org> wrote:> > > On 10/28/2013 04:29 AM, Mj Embd wrote: >> >> Slight modification GICC_AIAR (%s/GICV/GICC/g) >> >> On Mon, Oct 28, 2013 at 4:57 PM, Mj Embd <mj.embd@gmail.com> wrote: >>> >>> Does Xen GIC implementation use Grp0 as secure and Grp 1 as NS as >>> mentioned in GIC 400 manual >>> -- >>> When a GIC that implements the GIC Security Extensions is connected to >>> a processor that implements the ARM Security Extensions: >>> >>> Group 0 interrupts are Secure interrupts, and Group 1 interrupts are >>> Non-secure interrupts. >>> >>> >>> ARM IHI 0048B.b Non-Confidential ID072613 Pg 1-16 >>> --- >>> >>> The manual also states >>> >>> In GICv2, ARM recommends that separate registers are used to manage >>> Group 0 and Group 1 interrupts: >>> >>> GICV_IAR, GICV_EOIR, and GICV_HPPIR for Group 0 interrupts GICV_AIAR, >>> GICV_AEOIR, and GICV_AHPPIR for Group 1 interrupts. >>> >>> pg 5-162 >>> >>> >>> I was not able to find GICV_AIAR being used in code. > > > Xen is running in non-secure mode. The register GICC_AIAR is only used for > secure mode. Actually in secure mode, it''s an alias to GICC_IAR. > > -- > Julien Grall-- -mj
On 29 October 2013 07:14, Mj Embd <mj.embd@gmail.com> wrote:> Thanks. I found it mentioned in the manual. > Julien I had asked a question titled "ARM GIC virtualization > question", till now no one has responded, If it is possible can you > please help me out with it.I didn''t found a such question on xen mailing list... Where did you send it? cheers, -- Julien Grall
I have just sent with a more descriptive question with subject : [query] gic_set_lr always uses maintenance Interrupt On Thu, Oct 31, 2013 at 12:21 AM, Julien Grall <julien.grall@linaro.org> wrote:> On 29 October 2013 07:14, Mj Embd <mj.embd@gmail.com> wrote: >> Thanks. I found it mentioned in the manual. >> Julien I had asked a question titled "ARM GIC virtualization >> question", till now no one has responded, If it is possible can you >> please help me out with it. > > I didn''t found a such question on xen mailing list... Where did you send it? > > cheers, > > -- > Julien Grall-- -mj
On Thu, 2013-10-31 at 00:23 +0530, Mj Embd wrote:> I have just sent with a more descriptive question with subject : > > [query] gic_set_lr always uses maintenance InterruptI think I replied to this one this afternoon. Let me know if that was something different. For future discussions can you please avoid top-posting. Thanks. Ian.
On Thu, Oct 31, 2013 at 9:44 PM, Ian Campbell <Ian.Campbell@citrix.com> wrote:> On Thu, 2013-10-31 at 00:23 +0530, Mj Embd wrote: >> I have just sent with a more descriptive question with subject : >> >> [query] gic_set_lr always uses maintenance Interrupt > > I think I replied to this one this afternoon. Let me know if that was > something different. >yes I got your reply, thanks, will wait for the followup. I will reply on that mail itself> For future discussions can you please avoid top-posting. >Sure. I think this is inherent problem with gmail.> Thanks. > Ian. > >-- -mj