flight 21201 xen-unstable real [real]
http://www.chiark.greenend.org.uk/~xensrcts/logs/21201/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-win7-amd64 8 guest-saverestore fail REGR. vs. 21104
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-pcipt-intel 9 guest-start fail never pass
test-amd64-amd64-xl-qemut-win7-amd64 13 guest-stop fail never pass
test-amd64-amd64-xl-win7-amd64 13 guest-stop fail never pass
test-armhf-armhf-xl 5 xen-boot fail never pass
test-amd64-i386-xend-winxpsp3 16 leak-check/check fail never pass
test-amd64-amd64-xl-qemuu-winxpsp3 13 guest-stop fail never pass
test-amd64-i386-xl-qemut-win7-amd64 13 guest-stop fail never pass
test-amd64-i386-xl-win7-amd64 13 guest-stop fail never pass
test-amd64-amd64-xl-winxpsp3 13 guest-stop fail never pass
test-amd64-amd64-xl-qemut-winxpsp3 13 guest-stop fail never pass
test-amd64-i386-xend-qemut-winxpsp3 16 leak-check/check fail never pass
test-amd64-i386-xl-winxpsp3-vcpus1 13 guest-stop fail never pass
test-amd64-i386-xl-qemut-winxpsp3-vcpus1 13 guest-stop fail never pass
version targeted for testing:
xen b3cbe129d07ac9a41175491fdd3c882641588350
baseline version:
xen 170fa9967176c8627fe2e75dbe1dc5212019afde
------------------------------------------------------------
People who touched revisions under test:
Chen Baozi <baozich@gmail.com>
Ian Campbell <ian.campbell@citrix.com>
Julien Grall <julien.grall@linaro.org>
Julien Grall <julien.linaro.org>
Keir Fraser <keir@xen.org>
Paul Durrant <paul.durrant@citrix.com>
Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Tim Deegan <tim@xen.org>
Wei Liu <wei.liu2@citrix.com>
------------------------------------------------------------
jobs:
build-amd64 pass
build-armhf pass
build-i386 pass
build-amd64-oldkern pass
build-i386-oldkern pass
build-amd64-pvops pass
build-armhf-pvops pass
build-i386-pvops pass
test-amd64-amd64-xl pass
test-armhf-armhf-xl fail
test-amd64-i386-xl pass
test-amd64-i386-rhel6hvm-amd pass
test-amd64-i386-qemut-rhel6hvm-amd pass
test-amd64-i386-qemuu-rhel6hvm-amd pass
test-amd64-amd64-xl-qemut-win7-amd64 fail
test-amd64-i386-xl-qemut-win7-amd64 fail
test-amd64-amd64-xl-qemuu-win7-amd64 fail
test-amd64-amd64-xl-win7-amd64 fail
test-amd64-i386-xl-win7-amd64 fail
test-amd64-i386-xl-credit2 pass
test-amd64-amd64-xl-pcipt-intel fail
test-amd64-i386-rhel6hvm-intel pass
test-amd64-i386-qemut-rhel6hvm-intel pass
test-amd64-i386-qemuu-rhel6hvm-intel pass
test-amd64-i386-xl-multivcpu pass
test-amd64-amd64-pair pass
test-amd64-i386-pair pass
test-amd64-amd64-xl-sedf-pin pass
test-amd64-amd64-pv pass
test-amd64-i386-pv pass
test-amd64-amd64-xl-sedf pass
test-amd64-i386-xl-qemut-winxpsp3-vcpus1 fail
test-amd64-i386-xl-winxpsp3-vcpus1 fail
test-amd64-i386-xend-qemut-winxpsp3 fail
test-amd64-amd64-xl-qemut-winxpsp3 fail
test-amd64-amd64-xl-qemuu-winxpsp3 fail
test-amd64-i386-xend-winxpsp3 fail
test-amd64-amd64-xl-winxpsp3 fail
------------------------------------------------------------
sg-report-flight on woking.cam.xci-test.com
logs: /home/xc_osstest/logs
images: /home/xc_osstest/images
Logs, config files, etc. are available at
http://www.chiark.greenend.org.uk/~xensrcts/logs
Test harness code can be found at
http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary
Not pushing.
------------------------------------------------------------
commit b3cbe129d07ac9a41175491fdd3c882641588350
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:45 2013 +0100
xen: arm: Ensure HCR_EL2.RW is set correctly when building dom0
copy_to_user and friends rely on this, since the address transalation
functions (guest VA -> MFN) will truncate VA to the appropriate size.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit 80a7e7eaa177af948b1f4cc954bf2d39ee182724
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:44 2013 +0100
xen: arm: correctly round down MFN to 1GB boundary make sure pagetable mask
macros as physaddr size
~FIRST_MASK is nothing like correct for rounding down an MFN. It is the
inverse *and* an address not a framenumber so wrong in every dimension! We
cannot use FIRST_MASK since that would mask off any zeroeth level bits.
Instead calculate the correct value from FIRST_SIZE.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit 8e782d0191d260c1a143f081fa0a30c2a4182aee
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:43 2013 +0100
xen: arm: make sure pagetable mask macros have appropriate size
{ZEROETH,FIRST,SECOND,THIRD}_MASK are used with physical addresses which may
be larger than 32 bits. Therefore ensure that they are wide enough by
casting
to paddr_t otherwise we may truncate addresses on 32-bit.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit d2766bee0f1f0fc1c4dbf30dcc9a43b91d5f19ce
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:42 2013 +0100
xen: arm: map entire memory banks on arm64
Currently we only map regions which are not part of boot modules. However we
subsequently free at least some of those modules to the heaps in
discard_initial_modules and if we were unluckly with sizing/location we
might
end up adding unmapped pages to the heap.
The heaps on 64-bit use 1GB mappings, so in practice this is probably pretty
unlikely and I''ve not actually seen it.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit 50257e96b77c51b3eeb06ab68e7bd48ba2a8752b
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:41 2013 +0100
xen: arm: Enable 40 bit addressing in VTCR for arm64
This requires setting the v8 specific VTCR_EL2.PS field. These bits are
UNK/SBZP on v7.
Also the TS0SZ field is described slightly differently for v8, so update the
comment to reflect this.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit e4d7c89e34bf62eda5118d61caef9858c38cdf57
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Thu Oct 10 15:43:40 2013 +0100
xen: correct xenheap_bits after "xen: support RAM at addresses 0 and
4096"
This is incorrect after commit 1aac966e24e which shuffled the zones up by
one.
I''ve observed failures on arm64 systems with RAM at
0x8,00000000-0x8,7fffffff
since xenheap_bits ends up as 35 instead of 36 (which is the zone with all
the
RAM).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
Cc: Tim Deegan <tim@xen.org>
commit a067a9b960f6328e6bff620f7ab24096427bcc14
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Mon Oct 21 10:21:23 2013 +0100
xen: arm: fix usage of bootargs for Xen.
The chosen node''s bootargs property should be used for Xen if there
is a dom0
kernel multiboot module with a command line, not just if xen,dom0-bootargs
is
present.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.linaro.org>
commit badd47de999561ac31b7b6b7b2c3b34ef0476dad
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Tue Oct 22 17:12:14 2013 +0100
xen: arm: correct XEN_COMPILE_ARCH autodetection for arm64
At least on aarch64 openSUSE running with qemu-user-aarch64 "uname
-m" reports
"aarch64" and not "armv8" so include that in the
seddery. There''s no harm
leaving the existing armv8 rune too so do so.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit 6c21cb36e263de2db8716b477157a5b6cd531e1e
Author: Julien Grall <julien.grall@linaro.org>
Date: Tue Oct 22 11:51:48 2013 +0100
xen/arm: Allocate memory for dom0 from the bottom with the 1:1 Workaround
On Linux, the option CONFIG_ARM_PATCH_PHYS_VIRT (by default enabled) allows
the Kernel to be loaded anywhere (or nearly) by patching the translation
pv<->virt at boot time.
The current solution in Linux assuming that the delta physical address -
virtual address is always negative. A positive delta will destroy all the
optimisation to modify only a part of the translation instruction (add/sub).
By default, Xen is allocating memory from the top of memory and then
goes down. To avoid booting issue with Linux, we must allocate memory
from the bottom (ie starting from 0).
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit 466abd6b3866cda0866c03a9d7673f299d6f6754
Author: Chen Baozi <baozich@gmail.com>
Date: Tue Oct 15 16:45:31 2013 +0800
xen/arm: implement smp initialization callbacks for omap5
Signed-off-by: Chen Baozi <baozich@gmail.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit 96dfb26efab1de0d1a1bdb84987f13ab1be3498d
Author: Chen Baozi <baozich@gmail.com>
Date: Tue Oct 15 16:45:29 2013 +0800
xen/arm: fix a typo in comment of PLATFORM_QUIRK_DOM0_MAPPING_11
Signed-off-by: Chen Baozi <baozich@gmail.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
commit d319a371decf9f851e4b9c18c4e123b9d2e16a57
Author: Paul Durrant <paul.durrant@citrix.com>
Date: Thu Oct 24 09:47:50 2013 +0100
netif.h: Add IPv6 related changes
My recent patch series to Linux netback added IPv6 checksum
offload and GSO support. This involved making some changes to the
copy of netif.h in Linux.
This patch adds those changes to the canonical copy of netif.h.
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
commit 55021ff9ab691f8c79c1f881aa8ac40ae1cd4ab9
Author: Julien Grall <julien.grall@linaro.org>
Date: Wed Oct 23 17:28:47 2013 +0100
xen/arm: add_to_physmap_one: Avoid to map mfn 0 if an error occurs
By default, the function add_to_physmap_one set mfn to 0. Some code paths
that
result to an error, continue and the map the mfn 0 (valid on ARM) to the
slot given by the guest.
To fix the problem, return directly an error if sanity check has failed.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Tim Deegan <tim@xen.org>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
(qemu changes not included)