>>> On 25.09.13 at 21:29, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> Jan Beulich spotted that the PAT MSR settings in the Xen public
> document that "the first (PAT6) column was wrong across the
> board, and the column for PAT7 was missing altogether."
>
> This updates it to be in sync.
>
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
> ---
> arch/x86/xen/mmu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
> index fdc3ba2..c9631e7 100644
> --- a/arch/x86/xen/mmu.c
> +++ b/arch/x86/xen/mmu.c
> @@ -468,8 +468,8 @@ PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
> * 3 PCD PWT UC UC UC
> * 4 PAT WB WC WB
> * 5 PAT PWT WC WP WT
> - * 6 PAT PCD UC- UC UC-
> - * 7 PAT PCD PWT UC UC UC
> + * 6 PAT PCD UC- rsv UC-
> + * 7 PAT PCD PWT UC rsv UC
> */
>
> void xen_set_pat(u64 pat)
> --
> 1.8.3.1