Jan Beulich
2013-Apr-29 08:34 UTC
[PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
Since the AMD IOMMU code relies on the x86 generic MSI code, it also
needs to be updated to match "x86/MSI: cleanup to prepare for multi-
vector MSI".
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -775,9 +775,16 @@ static bool_t __init set_iommu_interrupt
control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf),
PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf),
iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS);
- iommu->msi.msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
- desc->handler = control & PCI_MSI_FLAGS_MASKBIT ?
- &iommu_maskable_msi_type : &iommu_msi_type;
+ iommu->msi.msi.nvec = 1;
+ if ( is_mask_bit_support(control) )
+ {
+ iommu->msi.msi_attrib.maskbit = 1;
+ iommu->msi.msi.mpos =
msi_mask_bits_reg(iommu->msi.msi_attrib.pos,
+ is_64bit_address(control));
+ desc->handler = &iommu_maskable_msi_type;
+ }
+ else
+ desc->handler = &iommu_msi_type;
ret = request_irq(irq, iommu_interrupt_handler, 0, "amd_iommu",
iommu);
if ( ret )
{
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Jan Beulich
2013-May-02 14:55 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
>>> On 29.04.13 at 10:34, "Jan Beulich" <JBeulich@suse.com> wrote:Ping?> Since the AMD IOMMU code relies on the x86 generic MSI code, it also > needs to be updated to match "x86/MSI: cleanup to prepare for multi- > vector MSI". > > Signed-off-by: Jan Beulich <jbeulich@suse.com> > > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -775,9 +775,16 @@ static bool_t __init set_iommu_interrupt > control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf), > PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf), > iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS); > - iommu->msi.msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); > - desc->handler = control & PCI_MSI_FLAGS_MASKBIT ? > - &iommu_maskable_msi_type : &iommu_msi_type; > + iommu->msi.msi.nvec = 1; > + if ( is_mask_bit_support(control) ) > + { > + iommu->msi.msi_attrib.maskbit = 1; > + iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos, > + is_64bit_address(control)); > + desc->handler = &iommu_maskable_msi_type; > + } > + else > + desc->handler = &iommu_msi_type; > ret = request_irq(irq, iommu_interrupt_handler, 0, "amd_iommu", iommu); > if ( ret ) > {
Suravee Suthikulanit
2013-May-06 22:43 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
This looks fine and tested. Thanks for the patch. Suravee On 4/29/2013 3:34 AM, Jan Beulich wrote:> Since the AMD IOMMU code relies on the x86 generic MSI code, it also > needs to be updated to match "x86/MSI: cleanup to prepare for multi- > vector MSI". > > Signed-off-by: Jan Beulich <jbeulich@suse.com> > > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -775,9 +775,16 @@ static bool_t __init set_iommu_interrupt > control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf), > PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf), > iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS); > - iommu->msi.msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); > - desc->handler = control & PCI_MSI_FLAGS_MASKBIT ? > - &iommu_maskable_msi_type : &iommu_msi_type; > + iommu->msi.msi.nvec = 1; > + if ( is_mask_bit_support(control) ) > + { > + iommu->msi.msi_attrib.maskbit = 1; > + iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos, > + is_64bit_address(control)); > + desc->handler = &iommu_maskable_msi_type; > + } > + else > + desc->handler = &iommu_msi_type; > ret = request_irq(irq, iommu_interrupt_handler, 0, "amd_iommu", iommu); > if ( ret ) > { > > >
Jan Beulich
2013-May-07 07:56 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
>>> On 07.05.13 at 00:43, Suravee Suthikulanit <suravee.suthikulpanit@amd.com> wrote: > This looks fine and tested. Thanks for the patch.Tested also underneath the multi-vector MSI series? I.e. did the assertion you were hitting not get triggered anymore with this in place, as expected? Thanks, Jan> On 4/29/2013 3:34 AM, Jan Beulich wrote: >> Since the AMD IOMMU code relies on the x86 generic MSI code, it also >> needs to be updated to match "x86/MSI: cleanup to prepare for multi- >> vector MSI". >> >> Signed-off-by: Jan Beulich <jbeulich@suse.com> >> >> --- a/xen/drivers/passthrough/amd/iommu_init.c >> +++ b/xen/drivers/passthrough/amd/iommu_init.c >> @@ -775,9 +775,16 @@ static bool_t __init set_iommu_interrupt >> control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf), >> PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf), >> iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS); >> - iommu->msi.msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT); >> - desc->handler = control & PCI_MSI_FLAGS_MASKBIT ? >> - &iommu_maskable_msi_type : &iommu_msi_type; >> + iommu->msi.msi.nvec = 1; >> + if ( is_mask_bit_support(control) ) >> + { >> + iommu->msi.msi_attrib.maskbit = 1; >> + iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos, >> + is_64bit_address(control)); >> + desc->handler = &iommu_maskable_msi_type; >> + } >> + else >> + desc->handler = &iommu_msi_type; >> ret = request_irq(irq, iommu_interrupt_handler, 0, "amd_iommu", > iommu); >> if ( ret ) >> { >> >> >>
Suravee Suthikulanit
2013-May-07 13:47 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
On 5/7/2013 2:56 AM, Jan Beulich wrote:>>>> On 07.05.13 at 00:43, Suravee Suthikulanit<suravee.suthikulpanit@amd.com> wrote: >> >This looks fine and tested. Thanks for the patch. > Tested also underneath the multi-vector MSI series? I.e. did the > assertion you were hitting not get triggered anymore with this in > place, as expected? > > Thanks, JanYes, I have tested it with the previous set (the x86/IOMMU: multi-vector MSI) that I report the ASSERTION plus the change I made to fix the IOAPIC. With this additional patch, it was no longer asserting since nvec is now 1 (instead of 0 in prior case). Suravee
Jan Beulich
2013-May-07 14:06 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
>>> On 07.05.13 at 15:47, Suravee Suthikulanit <suravee.suthikulpanit@amd.com>wrote:> On 5/7/2013 2:56 AM, Jan Beulich wrote: >>>>> On 07.05.13 at 00:43, Suravee Suthikulanit<suravee.suthikulpanit@amd.com> > wrote: >>> >This looks fine and tested. Thanks for the patch. >> Tested also underneath the multi-vector MSI series? I.e. did the >> assertion you were hitting not get triggered anymore with this in >> place, as expected? >> > Yes, I have tested it with the previous set (the x86/IOMMU: multi-vector > MSI) that I report the ASSERTION plus the change I made to fix the > IOAPIC. With this additional patch, it was no longer asserting since > nvec is now 1 (instead of 0 in prior case).Which suggests I could put your ack under the AMD patches when I resubmit that series after 4.3 got branched? Jan
Suravee Suthikulpanit
2013-May-08 05:21 UTC
Re: [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59
On 5/7/2013 9:06 AM, Jan Beulich wrote:>>>> On 07.05.13 at 15:47, Suravee Suthikulanit <suravee.suthikulpanit@amd.com> > wrote: >> On 5/7/2013 2:56 AM, Jan Beulich wrote: >>>>>> On 07.05.13 at 00:43, Suravee Suthikulanit<suravee.suthikulpanit@amd.com> >> wrote: >>>>> This looks fine and tested. Thanks for the patch. >>> Tested also underneath the multi-vector MSI series? I.e. did the >>> assertion you were hitting not get triggered anymore with this in >>> place, as expected? >>> >> Yes, I have tested it with the previous set (the x86/IOMMU: multi-vector >> MSI) that I report the ASSERTION plus the change I made to fix the >> IOAPIC. With this additional patch, it was no longer asserting since >> nvec is now 1 (instead of 0 in prior case). > Which suggests I could put your ack under the AMD patches when > I resubmit that series after 4.3 got branched? > > Jan > >Yes, please do. Suravee _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel