Since xen has its own control of mask bit in msix entry, it''s better to
simulate a vmask for hvm guest.
This will let changing irq affinity of old kernel(2.6.32 no msi_pirq support)
work and avoid no irq handler error in guest.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
---
hw/pt-msi.c | 10 +---------
1 files changed, 1 insertions(+), 9 deletions(-)
diff --git a/hw/pt-msi.c b/hw/pt-msi.c
index 73f737d..6f28522 100644
--- a/hw/pt-msi.c
+++ b/hw/pt-msi.c
@@ -445,18 +445,10 @@ static void pci_msix_writel(void *opaque,
target_phys_addr_t addr, uint32_t val)
if ( offset != 3 )
{
- const volatile uint32_t *vec_ctrl;
-
if ( entry->io_mem[offset] == val )
return;
- /*
- * If Xen intercepts the mask bit access, io_mem[3] may not be
- * up-to-date. Read from hardware directly.
- */
- vec_ctrl = msix->phys_iomem_base + 16 * entry_nr + 12;
-
- if ( msix->enabled && !(*vec_ctrl & 0x1) )
+ if ( msix->enabled && !(entry->io_mem[3] & 0x1) )
{
PT_LOG("Can''t update entry %d since MSI-X is already
enabled"
" (%08"PRIx32" ->
%08"PRIx32")\n",
--
1.7.3