Konrad Rzeszutek Wilk
2013-Mar-04 18:04 UTC
[PATCH] comments in the vpmu_core2 code and additional cpuids (v2).
Per feedback, I am reposting the patches the comments addressed. Jun, I am more than happy to alter it to hex, it is just that in the Linux code (perf) they are all in decimal numbers. I thought it would be easier to keep it the same here as in Linux.
Konrad Rzeszutek Wilk
2013-Mar-04 18:04 UTC
[PATCH 1/2] x86/Intel: Provide comments for which model is what.
Acked-by: Tim Deegan <tim@xen.org> [v1: Tim suggested to remove ''current'' from the comments] Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> --- xen/arch/x86/hvm/vmx/vpmu_core2.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c index 2cef2d6..5d22a70 100644 --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -738,16 +738,16 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) { switch ( cpu_model ) { - case 15: - case 23: - case 26: - case 29: - case 42: - case 45: - case 46: - case 47: - case 58: - case 62: + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ + case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ + case 26: /* 45 nm nehalem, "Bloomfield" */ + case 29: /* six-core 45 nm xeon "Dunnington" */ + case 42: /* SandyBridge */ + case 45: /* SandyBridge, "Romely-EP" */ + case 46: /* 45 nm nehalem-ex, "Beckton" */ + case 47: /* 32 nm Xeon E7 */ + case 58: /* IvyBridge */ + case 62: /* IvyBridge EP */ ret = core2_vpmu_initialise(v, vpmu_flags); if ( !ret ) vpmu->arch_vpmu_ops = &core2_vpmu_ops; -- 1.8.0.2
Konrad Rzeszutek Wilk
2013-Mar-04 18:04 UTC
[PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). A comprehensive list is available at: http://software.intel.com/en-us/articles/intel-architecture-and-processor-identification-with-cpuid-model-and-family-numbers [v1: Rebased] [v2: Per Jun Nakajima comments fixed the description]. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> --- xen/arch/x86/hvm/vmx/vpmu_core2.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c index 5d22a70..dea9833 100644 --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) { switch ( cpu_model ) { + /* Core2: */ case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ - case 26: /* 45 nm nehalem, "Bloomfield" */ case 29: /* six-core 45 nm xeon "Dunnington" */ + case 42: /* SandyBridge */ case 45: /* SandyBridge, "Romely-EP" */ + + /* Nehalem: */ + case 26: /* 45 nm nehalem, "Bloomfield" */ + case 30: /* 45 nm nehalem, "Lynnfield", "Clarksfield", "Jasper Forest" */ case 46: /* 45 nm nehalem-ex, "Beckton" */ - case 47: /* 32 nm Xeon E7 */ + + /* Westmere: */ + case 37: /* 32 nm nehalem, "Clarkdale", "Arrandale" */ + case 44: /* 32 nm nehalem, "Gulftown", "Westmere-EP" */ + case 47: /* 32 nm Westmere-EX */ + case 58: /* IvyBridge */ case 62: /* IvyBridge EP */ ret = core2_vpmu_initialise(v, vpmu_flags); -- 1.8.0.2