Looking at vmx_vpmu_initialise, I see: 741 case 15: 742 case 23: 743 case 26: 744 case 29: 745 case 42: 746 case 45: 747 case 46: 748 case 47: 749 case 58: 750 case 62: Which means that we are missing ''22'' Merom-L"/"Conroe-L (thought we support the earlier Merom). Also missing from the Westmere family: case 37: /* 32 nm nehalem, "Clarkdale" */ case 44: /* 32 nm nehalem, "Gulftown" */ and from the Nehelem the case 30: /* 45 nm nehalem, "Lynnfield" */ is missing? Any reason? The Atom one''s are also missing .. Would Intel be OK with these two patches (attached as thread):
Konrad Rzeszutek Wilk
2013-Mar-01 14:31 UTC
[PATCH 1/2] x86/Intel: Provide comments for which model is what.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
xen/arch/x86/hvm/vmx/vpmu_core2.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c
b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 2cef2d6..6511605 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -738,16 +738,16 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int
vpmu_flags)
{
switch ( cpu_model )
{
- case 15:
- case 23:
- case 26:
- case 29:
- case 42:
- case 45:
- case 46:
- case 47:
- case 58:
- case 62:
+ case 15: /* original 65 nm celeron/pentium/core2/xeon,
"Merom"/"Conroe" */
+ case 23: /* current 45 nm celeron/core2/xeon
"Penryn"/"Wolfdale" */
+ case 26: /* 45 nm nehalem, "Bloomfield" */
+ case 29: /* six-core 45 nm xeon "Dunnington" */
+ case 42: /* SandyBridge */
+ case 45: /* SandyBridge, "Romely-EP" */
+ case 46: /* 45 nm nehalem-ex, "Beckton" */
+ case 47: /* 32 nm Xeon E7 */
+ case 58: /* IvyBridge */
+ case 62: /* IvyBridge EP */
ret = core2_vpmu_initialise(v, vpmu_flags);
if ( !ret )
vpmu->arch_vpmu_ops = &core2_vpmu_ops;
--
1.8.0.2
Konrad Rzeszutek Wilk
2013-Mar-01 14:31 UTC
[PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere).
Moving the 22 to be with the rest of the Nehelem models.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
xen/arch/x86/hvm/vmx/vpmu_core2.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c
b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 6511605..3791be9 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int
vpmu_flags)
{
switch ( cpu_model )
{
+ /* Core2: */
case 15: /* original 65 nm celeron/pentium/core2/xeon,
"Merom"/"Conroe" */
+ case 22: /* single-core 65 nm celeron/core2solo
"Merom-L"/"Conroe-L" */
case 23: /* current 45 nm celeron/core2/xeon
"Penryn"/"Wolfdale" */
- case 26: /* 45 nm nehalem, "Bloomfield" */
case 29: /* six-core 45 nm xeon "Dunnington" */
+
case 42: /* SandyBridge */
case 45: /* SandyBridge, "Romely-EP" */
+
+ /* Nehelem: */
+ case 26: /* 45 nm nehalem, "Bloomfield" */
+ case 30: /* 45 nm nehalem, "Lynnfield" */
case 46: /* 45 nm nehalem-ex, "Beckton" */
+
+ /* Westmere: */
+ case 37: /* 32 nm nehalem, "Clarkdale" */
+ case 44: /* 32 nm nehalem, "Gulftown" */
case 47: /* 32 nm Xeon E7 */
+
case 58: /* IvyBridge */
case 62: /* IvyBridge EP */
ret = core2_vpmu_initialise(v, vpmu_flags);
--
1.8.0.2
Tim Deegan
2013-Mar-01 14:45 UTC
Re: [PATCH 1/2] x86/Intel: Provide comments for which model is what.
At 09:31 -0500 on 01 Mar (1362130307), Konrad Rzeszutek Wilk wrote:> + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > + case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */No opinion about the patch in general, but it might be better not to say "current" here, at least without attaching a date. Tim.> + case 26: /* 45 nm nehalem, "Bloomfield" */ > + case 29: /* six-core 45 nm xeon "Dunnington" */ > + case 42: /* SandyBridge */ > + case 45: /* SandyBridge, "Romely-EP" */ > + case 46: /* 45 nm nehalem-ex, "Beckton" */ > + case 47: /* 32 nm Xeon E7 */ > + case 58: /* IvyBridge */ > + case 62: /* IvyBridge EP */ > ret = core2_vpmu_initialise(v, vpmu_flags); > if ( !ret ) > vpmu->arch_vpmu_ops = &core2_vpmu_ops; > -- > 1.8.0.2 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel
Konrad Rzeszutek Wilk
2013-Mar-01 15:30 UTC
Re: [PATCH 1/2] x86/Intel: Provide comments for which model is what.
On Fri, Mar 01, 2013 at 02:45:08PM +0000, Tim Deegan wrote:> At 09:31 -0500 on 01 Mar (1362130307), Konrad Rzeszutek Wilk wrote: > > + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > + case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > No opinion about the patch in general, but it might be better not to say > "current" here, at least without attaching a date.OK. How about this: commit 7de84d0668df18977ebc9c299d6562676e76dbd5 Author: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Date: Fri Mar 1 09:21:35 2013 -0500 x86/Intel: Provide comments for which model is what. [v1: Tim suggested to remove ''current'' from the comments] Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c index 2cef2d6..5d22a70 100644 --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -738,16 +738,16 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) { switch ( cpu_model ) { - case 15: - case 23: - case 26: - case 29: - case 42: - case 45: - case 46: - case 47: - case 58: - case 62: + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ + case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ + case 26: /* 45 nm nehalem, "Bloomfield" */ + case 29: /* six-core 45 nm xeon "Dunnington" */ + case 42: /* SandyBridge */ + case 45: /* SandyBridge, "Romely-EP" */ + case 46: /* 45 nm nehalem-ex, "Beckton" */ + case 47: /* 32 nm Xeon E7 */ + case 58: /* IvyBridge */ + case 62: /* IvyBridge EP */ ret = core2_vpmu_initialise(v, vpmu_flags); if ( !ret ) vpmu->arch_vpmu_ops = &core2_vpmu_ops;
Simon Rowe
2013-Mar-01 15:49 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
On 01/03/13 14:31, Konrad Rzeszutek Wilk wrote:> case 45: /* SandyBridge, "Romely-EP" */S/Romely/Romley
Jan Beulich
2013-Mar-01 15:50 UTC
Re: [PATCH 1/2] x86/Intel: Provide comments for which model is what.
>>> On 01.03.13 at 16:30, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > OK. How about this:If you fiddle with this list as a whole, please also convert to hex numbers - (almost?) everywhere else we look at those model numbers, we already use their hex representation.> commit 7de84d0668df18977ebc9c299d6562676e76dbd5 > Author: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > Date: Fri Mar 1 09:21:35 2013 -0500 > > x86/Intel: Provide comments for which model is what. > > [v1: Tim suggested to remove ''current'' from the comments] > Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > > diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c > b/xen/arch/x86/hvm/vmx/vpmu_core2.c > index 2cef2d6..5d22a70 100644 > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > @@ -738,16 +738,16 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int > vpmu_flags) > { > switch ( cpu_model ) > { > - case 15: > - case 23: > - case 26: > - case 29: > - case 42: > - case 45: > - case 46: > - case 47: > - case 58: > - case 62: > + case 15: /* original 65 nm celeron/pentium/core2/xeon, > "Merom"/"Conroe" */ > + case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > + case 26: /* 45 nm nehalem, "Bloomfield" */ > + case 29: /* six-core 45 nm xeon "Dunnington" */ > + case 42: /* SandyBridge */ > + case 45: /* SandyBridge, "Romely-EP" */ > + case 46: /* 45 nm nehalem-ex, "Beckton" */ > + case 47: /* 32 nm Xeon E7 */ > + case 58: /* IvyBridge */ > + case 62: /* IvyBridge EP */ > ret = core2_vpmu_initialise(v, vpmu_flags); > if ( !ret ) > vpmu->arch_vpmu_ops = &core2_vpmu_ops;
Jan Beulich
2013-Mar-01 15:53 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
>>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere).Assuming Intel confirms this, I''m fine with adding those.> --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > { > switch ( cpu_model ) > { > + /* Core2: */ > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > - case 26: /* 45 nm nehalem, "Bloomfield" */ > case 29: /* six-core 45 nm xeon "Dunnington" */ > + > case 42: /* SandyBridge */ > case 45: /* SandyBridge, "Romely-EP" */ > + > + /* Nehelem: */Nehalem> + case 26: /* 45 nm nehalem, "Bloomfield" */ > + case 30: /* 45 nm nehalem, "Lynnfield" */ > case 46: /* 45 nm nehalem-ex, "Beckton" */ > + > + /* Westmere: */ > + case 37: /* 32 nm nehalem, "Clarkdale" */ > + case 44: /* 32 nm nehalem, "Gulftown" */ > case 47: /* 32 nm Xeon E7 */ > + > case 58: /* IvyBridge */ > case 62: /* IvyBridge EP */ > ret = core2_vpmu_initialise(v, vpmu_flags);I guess the main reason these weren''t here is that no-one actively tested the code on them. Fujitsu has been completing this list as they ran into systems missing here yet they were able to test on... Jan
Tim Deegan
2013-Mar-01 15:55 UTC
Re: [PATCH 1/2] x86/Intel: Provide comments for which model is what.
At 10:30 -0500 on 01 Mar (1362133842), Konrad Rzeszutek Wilk wrote:> On Fri, Mar 01, 2013 at 02:45:08PM +0000, Tim Deegan wrote: > > At 09:31 -0500 on 01 Mar (1362130307), Konrad Rzeszutek Wilk wrote: > > > + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > > + case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > > > No opinion about the patch in general, but it might be better not to say > > "current" here, at least without attaching a date. > > OK. How about this:Looks good to me, though I haven''t checked the translations are correct. I guess you''ll need an ack from Jun or Eddie. Also CC''ing Dietmar Hahn, who''s been working on vpmu most recently. Tim.> commit 7de84d0668df18977ebc9c299d6562676e76dbd5 > Author: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > Date: Fri Mar 1 09:21:35 2013 -0500 > > x86/Intel: Provide comments for which model is what. > > [v1: Tim suggested to remove ''current'' from the comments] > Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > > diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c > index 2cef2d6..5d22a70 100644 > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > @@ -738,16 +738,16 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > { > switch ( cpu_model ) > { > - case 15: > - case 23: > - case 26: > - case 29: > - case 42: > - case 45: > - case 46: > - case 47: > - case 58: > - case 62: > + case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > + case 23: /* 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > + case 26: /* 45 nm nehalem, "Bloomfield" */ > + case 29: /* six-core 45 nm xeon "Dunnington" */ > + case 42: /* SandyBridge */ > + case 45: /* SandyBridge, "Romely-EP" */ > + case 46: /* 45 nm nehalem-ex, "Beckton" */ > + case 47: /* 32 nm Xeon E7 */ > + case 58: /* IvyBridge */ > + case 62: /* IvyBridge EP */ > ret = core2_vpmu_initialise(v, vpmu_flags); > if ( !ret ) > vpmu->arch_vpmu_ops = &core2_vpmu_ops; > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel
Konrad Rzeszutek Wilk
2013-Mar-01 16:40 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
On Fri, Mar 01, 2013 at 03:53:11PM +0000, Jan Beulich wrote:> >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > Assuming Intel confirms this, I''m fine with adding those. > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > > { > > switch ( cpu_model ) > > { > > + /* Core2: */ > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > + > > case 42: /* SandyBridge */ > > case 45: /* SandyBridge, "Romely-EP" */ > > + > > + /* Nehelem: */ > > Nehalem > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > + > > + /* Westmere: */ > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > case 47: /* 32 nm Xeon E7 */ > > + > > case 58: /* IvyBridge */ > > case 62: /* IvyBridge EP */ > > ret = core2_vpmu_initialise(v, vpmu_flags); > > I guess the main reason these weren''t here is that no-one actively > tested the code on them. Fujitsu has been completing this list as > they ran into systems missing here yet they were able to test on...The 44 has been definitly tested by me.> > Jan > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel >
Nakajima, Jun
2013-Mar-01 18:37 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
On Fri, Mar 1, 2013 at 7:53 AM, Jan Beulich <JBeulich@suse.com> wrote:>>>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: >> Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > Assuming Intel confirms this, I''m fine with adding those.The following URL, for example, has comprehensive information. http://software.intel.com/en-us/articles/intel-architecture-and-processor-identification-with-cpuid-model-and-family-numbers BTW, probably we should be using hexadecimal in the code?> >> --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c >> +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c >> @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) >> { >> switch ( cpu_model ) >> { >> + /* Core2: */ >> case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ >> + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ >> case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ >> - case 26: /* 45 nm nehalem, "Bloomfield" */ >> case 29: /* six-core 45 nm xeon "Dunnington" */ >> + >> case 42: /* SandyBridge */ >> case 45: /* SandyBridge, "Romely-EP" */ >> + >> + /* Nehelem: */ > > Nehalem > >> + case 26: /* 45 nm nehalem, "Bloomfield" */ >> + case 30: /* 45 nm nehalem, "Lynnfield" */+ Clarksfield, Jasper Forest>> case 46: /* 45 nm nehalem-ex, "Beckton" */ >> + >> + /* Westmere: */ >> + case 37: /* 32 nm nehalem, "Clarkdale" */+ Arrandale>> + case 44: /* 32 nm nehalem, "Gulftown" */+ case 47: /* Westmere-EX */>> case 47: /* 32 nm Xeon E7 */ >> + >> case 58: /* IvyBridge */ >> case 62: /* IvyBridge EP */ >> ret = core2_vpmu_initialise(v, vpmu_flags); > > I guess the main reason these weren''t here is that no-one actively > tested the code on them. Fujitsu has been completing this list as > they ran into systems missing here yet they were able to test on... > > Jan >-- Jun Intel Open Source Technology Center
Dietmar Hahn
2013-Mar-04 08:15 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
Am Freitag 01 März 2013, 15:53:11 schrieb Jan Beulich:> >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > Assuming Intel confirms this, I'm fine with adding those. > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > > { > > switch ( cpu_model ) > > { > > + /* Core2: */ > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > + > > case 42: /* SandyBridge */ > > case 45: /* SandyBridge, "Romely-EP" */ > > + > > + /* Nehelem: */ > > Nehalem > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > + > > + /* Westmere: */ > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > case 47: /* 32 nm Xeon E7 */ > > + > > case 58: /* IvyBridge */ > > case 62: /* IvyBridge EP */ > > ret = core2_vpmu_initialise(v, vpmu_flags); > > I guess the main reason these weren't here is that no-one actively > tested the code on them. Fujitsu has been completing this list as > they ran into systems missing here yet they were able to test on...Yes we did some extensions but only with processors we were able to test because we ran into trouble with some of these. Dietmar. Company details: http://ts.fujitsu.com/imprint.html _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
Konrad Rzeszutek Wilk
2013-Mar-04 18:01 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
On Mon, Mar 04, 2013 at 09:15:35AM +0100, Dietmar Hahn wrote:> Am Freitag 01 März 2013, 15:53:11 schrieb Jan Beulich: > > >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > > > Assuming Intel confirms this, I''m fine with adding those. > > > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > > > { > > > switch ( cpu_model ) > > > { > > > + /* Core2: */ > > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > > + > > > case 42: /* SandyBridge */ > > > case 45: /* SandyBridge, "Romely-EP" */ > > > + > > > + /* Nehelem: */ > > > > Nehalem > > > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > > + > > > + /* Westmere: */ > > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > > case 47: /* 32 nm Xeon E7 */ > > > + > > > case 58: /* IvyBridge */ > > > case 62: /* IvyBridge EP */ > > > ret = core2_vpmu_initialise(v, vpmu_flags); > > > > I guess the main reason these weren''t here is that no-one actively > > tested the code on them. Fujitsu has been completing this list as > > they ran into systems missing here yet they were able to test on... > > Yes we did some extensions but only with processors we were able to test > because we ran into trouble with some of these.What were those problems? Could you report them on xen-devel please?
Dietmar Hahn
2013-Mar-05 13:49 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
Am Montag 04 März 2013, 13:01:51 schrieb Konrad Rzeszutek Wilk:> On Mon, Mar 04, 2013 at 09:15:35AM +0100, Dietmar Hahn wrote: > > Am Freitag 01 März 2013, 15:53:11 schrieb Jan Beulich: > > > >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > > > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > > > > > Assuming Intel confirms this, I''m fine with adding those. > > > > > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > > > > { > > > > switch ( cpu_model ) > > > > { > > > > + /* Core2: */ > > > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > > > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > > > + > > > > case 42: /* SandyBridge */ > > > > case 45: /* SandyBridge, "Romely-EP" */ > > > > + > > > > + /* Nehelem: */ > > > > > > Nehalem > > > > > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > > > + > > > > + /* Westmere: */ > > > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > > > case 47: /* 32 nm Xeon E7 */ > > > > + > > > > case 58: /* IvyBridge */ > > > > case 62: /* IvyBridge EP */ > > > > ret = core2_vpmu_initialise(v, vpmu_flags); > > > > > > I guess the main reason these weren''t here is that no-one actively > > > tested the code on them. Fujitsu has been completing this list as > > > they ran into systems missing here yet they were able to test on... > > > > Yes we did some extensions but only with processors we were able to test > > because we ran into trouble with some of these. > > What were those problems? Could you report them on xen-devel please?This is old stuff: http://lists.xen.org/archives/html/xen-devel/2010-11/msg01157.html Dietmar. -- Company details: http://ts.fujitsu.com/imprint.html
Konrad Rzeszutek Wilk
2013-Mar-05 14:00 UTC
Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.
On Tue, Mar 05, 2013 at 02:49:22PM +0100, Dietmar Hahn wrote:> Am Montag 04 März 2013, 13:01:51 schrieb Konrad Rzeszutek Wilk: > > On Mon, Mar 04, 2013 at 09:15:35AM +0100, Dietmar Hahn wrote: > > > Am Freitag 01 März 2013, 15:53:11 schrieb Jan Beulich: > > > > >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> wrote: > > > > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > > > > > > > Assuming Intel confirms this, I''m fine with adding those. > > > > > > > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags) > > > > > { > > > > > switch ( cpu_model ) > > > > > { > > > > > + /* Core2: */ > > > > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */ > > > > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */ > > > > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */ > > > > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > > > > + > > > > > case 42: /* SandyBridge */ > > > > > case 45: /* SandyBridge, "Romely-EP" */ > > > > > + > > > > > + /* Nehelem: */ > > > > > > > > Nehalem > > > > > > > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > > > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > > > > + > > > > > + /* Westmere: */ > > > > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > > > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > > > > case 47: /* 32 nm Xeon E7 */ > > > > > + > > > > > case 58: /* IvyBridge */ > > > > > case 62: /* IvyBridge EP */ > > > > > ret = core2_vpmu_initialise(v, vpmu_flags); > > > > > > > > I guess the main reason these weren''t here is that no-one actively > > > > tested the code on them. Fujitsu has been completing this list as > > > > they ran into systems missing here yet they were able to test on... > > > > > > Yes we did some extensions but only with processors we were able to test > > > because we ran into trouble with some of these. > > > > What were those problems? Could you report them on xen-devel please? > > This is old stuff: > http://lists.xen.org/archives/html/xen-devel/2010-11/msg01157.htmlAnd it looks like it is part of the Xen tree now? commit 3ed6a063d2a5f6197306b030e8c27c36d5f31aa1 Author: Keir Fraser <keir@xen.org> Date: Mon Nov 22 19:16:34 2010 +0000 x86 hvm: Fix VPMU issue on Nehalem cpus Fix an issue on Nehalem cpus where performance counter overflows may lead to endless interrupt loops on this cpu. Signed-off-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>> > Dietmar. > > -- > Company details: http://ts.fujitsu.com/imprint.html