Zhang, Xiantao
2012-Aug-24 08:26 UTC
[PATCH 1/2] Nested: Don''t set bit 55 in IA32_VMX_BASIC_MSR
From b618c734fcb842de6dc7e06ca683f45f9e0235b9 Mon Sep 17 00:00:00 2001
From: Zhang Xiantao <xiantao.zhang@intel.com>
Date: Sat, 25 Aug 2012 04:02:51 +0800
Subject: [PATCH 1/2] Nested: Don''t set bit 55 in IA32_VMX_BASIC_MSR
All related IA32_VMX_TRUE_*_MSR are not implemented,
so set this bit to 0, otherwise system L1VMM may
get incorrect default1 class settings.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
---
xen/arch/x86/hvm/vmx/vvmx.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index fc733a9..8e005cd 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -1290,7 +1290,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64
*msr_content)
switch (msr) {
case MSR_IA32_VMX_BASIC:
data = VVMCS_REVISION | ((u64)PAGE_SIZE) << 32 |
- ((u64)MTRR_TYPE_WRBACK) << 50 | (1ULL << 55);
+ ((u64)MTRR_TYPE_WRBACK) << 50;
break;
case MSR_IA32_VMX_PINBASED_CTLS:
/* 1-seetings */
--
1.7.0.4
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