Xen devel - Dec 2010 - [PATCH]x86:xsaveopt: Enable xsaveopt feature in Xen and guest

x86:xsaveopt: Enable xsaveopt feature in Xen and guest

This patch uses "xsaveopt" instead of "xsave" if the feature
is supported in hardware to optimize task switch performance in Xen. It also
exposes the feature to guest VMs.

Signed-off-by: Zhang Fengzhe <fengzhe.zhang@intel.com>

diff -r de851b79600c xen/arch/x86/hvm/hvm.c
--- a/xen/arch/x86/hvm/hvm.c	Fri Dec 03 06:37:48 2010 +0000
+++ b/xen/arch/x86/hvm/hvm.c	Tue Dec 14 22:53:12 2010 +0800
@@ -2146,6 +2146,9 @@
                 *ebx = XSTATE_YMM_OFFSET;
                 break;
             case 1:
+                if ( cpu_has_xsaveopt )
+                    *eax = XSAVEOPT;
+                break;
             default:
                 break;
             }
diff -r de851b79600c xen/arch/x86/i387.c
--- a/xen/arch/x86/i387.c	Fri Dec 03 06:37:48 2010 +0000
+++ b/xen/arch/x86/i387.c	Tue Dec 14 22:53:12 2010 +0800
@@ -39,7 +39,10 @@
          * we set all accumulated feature mask before doing save/restore.
          */
         set_xcr0(v->arch.xcr0_accum);
-        xsave(v);
+        if ( cpu_has_xsaveopt )
+            xsaveopt(v);
+        else
+            xsave(v);
         set_xcr0(v->arch.xcr0);
     }
     else if ( cpu_has_fxsr )
@@ -152,6 +155,8 @@
 /* Cached xcr0 for fast read */
 DEFINE_PER_CPU(uint64_t, xcr0);
 
+u32 cpu_has_xsaveopt;
+
 void xsave_init(void)
 {
     u32 eax, ebx, ecx, edx;
@@ -196,6 +201,12 @@
         xfeature_mask &= XCNTXT_MASK;
         printk("%s: using cntxt_size: 0x%x and states:
0x%"PRIx64"\n",
             __func__, xsave_cntxt_size, xfeature_mask);
+
+        /* Check XSAVEOPT feature. */
+        cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+        if ( eax & XSAVEOPT )
+            cpu_has_xsaveopt = 1;
+
     }
     else
     {
diff -r de851b79600c xen/include/asm-x86/i387.h
--- a/xen/include/asm-x86/i387.h	Fri Dec 03 06:37:48 2010 +0000
+++ b/xen/include/asm-x86/i387.h	Tue Dec 14 22:53:12 2010 +0800
@@ -16,6 +16,7 @@
 
 extern unsigned int xsave_cntxt_size;
 extern u64 xfeature_mask;
+extern u32 cpu_has_xsaveopt;
 
 void xsave_init(void);
 int xsave_alloc_save_area(struct vcpu *v); @@ -28,6 +29,7 @@
 #define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
 #define XSTATE_YMM_OFFSET  (512 + 64)
 #define XSTATE_YMM_SIZE    256
+#define XSAVEOPT        (1 << 0)
 
 struct xsave_struct
 {
@@ -84,6 +86,18 @@
         : "memory");
 }
 
+static inline void xsaveopt(struct vcpu *v) {
+    struct xsave_struct *ptr;
+
+    ptr =(struct xsave_struct *)v->arch.xsave_area;
+
+    asm volatile (".byte " REX_PREFIX "0x0f,0xae,0x37"
+        :
+        : "a" (-1), "d" (-1), "D"(ptr)
+        : "memory");
+}
+
 static inline void xrstor(struct vcpu *v)  {
     struct xsave_struct *ptr;




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>>> On 17.12.10 at 07:31, "Zhang, Fengzhe"
<fengzhe.zhang@intel.com> wrote:
> --- a/xen/arch/x86/i387.c	Fri Dec 03 06:37:48 2010 +0000
> @@ -152,6 +155,8 @@
>  /* Cached xcr0 for fast read */
>  DEFINE_PER_CPU(uint64_t, xcr0);
>  
> +u32 cpu_has_xsaveopt;
bool_t __read_mostly?

Jan



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