Cui, Dexuan
2007-May-17 06:52 UTC
[Xen-devel] [Patch] Add VMX memory-mapped Local APIC access optimization
Some operating systems access the local APIC TPR very frequently, and we handle that using software-based local APIC virtualization in Xen today. Such virtualization incurs a number of VM exits from the memory-access instructions against the APIC page in the guest. The attached patch enables the TPR shadow feature that provides APIC TPR virtualization in hardware. Our tests indicate it can significantly boost the performance of such guests including 32-bit Windows XP/2003. Moreover, with the patch, local APIC accesses other than TPR in guests are intercepted directly as APIC_ACCESS VM exits rather than PAGE_FAULT VM exits; this can lower the emulation cost of such accesses. Signed-off-by: Dexuan Cui <dexuan.cui@intel.com> PS, the related document is available in the latest Intel SDM 3B: http://www.intel.com/products/processor/manuals/index.htm _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
Keir Fraser
2007-May-30 16:32 UTC
Re: [Xen-devel] [Patch] Add VMX memory-mapped Local APIC access optimization
Applied but I''ve subsequently ''simplified'' it quite a bit. :-) You''ll want to pull it from the staging tree and make sure it actually still works. -- Keir On 17/5/07 07:52, "Cui, Dexuan" <dexuan.cui@intel.com> wrote:> Some operating systems access the local APIC TPR very frequently, and we > handle that using software-based local APIC virtualization in Xen today. > Such virtualization incurs a number of VM exits from the memory-access > instructions against the APIC page in the guest. > > The attached patch enables the TPR shadow feature that provides APIC TPR > virtualization in hardware. Our tests indicate it can significantly > boost the performance of such guests including 32-bit Windows XP/2003. > > Moreover, with the patch, local APIC accesses other than TPR in guests > are intercepted directly as APIC_ACCESS VM exits rather than PAGE_FAULT > VM exits; this can lower the emulation cost of such accesses. > > Signed-off-by: Dexuan Cui <dexuan.cui@intel.com> > > PS, the related document is available in the latest Intel SDM 3B: > http://www.intel.com/products/processor/manuals/index.htm > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com > http://lists.xensource.com/xen-devel_______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
Cui, Dexuan
2007-May-31 04:00 UTC
RE: [Xen-devel] [Patch] Add VMX memory-mapped Local APIC access optimization
Keir, Thanks a lot for the simplification! :) I made some simple tests, and verified at least on my host the vTPR feature really works and the performance of SMP Windows 2003 Guest behaves much better. -- Dexuan -----Original Message----- From: Keir Fraser [mailto:keir@xensource.com] Sent: 2007年5月31日 0:32 To: Cui, Dexuan; xen-devel@lists.xensource.com Cc: Li, Xin B; Dong, Eddie; Nakajima, Jun Subject: Re: [Xen-devel] [Patch] Add VMX memory-mapped Local APIC access optimization Applied but I''ve subsequently ''simplified'' it quite a bit. :-) You''ll want to pull it from the staging tree and make sure it actually still works. -- Keir On 17/5/07 07:52, "Cui, Dexuan" <dexuan.cui@intel.com> wrote:> Some operating systems access the local APIC TPR very frequently, and we > handle that using software-based local APIC virtualization in Xen today. > Such virtualization incurs a number of VM exits from the memory-access > instructions against the APIC page in the guest. > > The attached patch enables the TPR shadow feature that provides APIC TPR > virtualization in hardware. Our tests indicate it can significantly > boost the performance of such guests including 32-bit Windows XP/2003. > > Moreover, with the patch, local APIC accesses other than TPR in guests > are intercepted directly as APIC_ACCESS VM exits rather than PAGE_FAULT > VM exits; this can lower the emulation cost of such accesses. > > Signed-off-by: Dexuan Cui <dexuan.cui@intel.com> > > PS, the related document is available in the latest Intel SDM 3B: > http://www.intel.com/products/processor/manuals/index.htm > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com > http://lists.xensource.com/xen-devel_______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel